H27U4G8F2D Datasheet, PDF (10/62 Pages) Hynix Semiconductor – 4 Gbit (512M x 8 bit) NAND Flash

APCPCWM_4828539:WP_0000001WP_0000001
1.4 Address role
1^st Cycle
2^nd Cycle
3^rd Cycle
4^th Cycle
5^th Cycle (*)
DQ0
A0
A8
A12
A20
A28
1
H27(U_S)4G8_6F2D
4 Gbit (512M x 8 bit) NAND Flash
DQ1
A1
A9
A13
A21
A29
DQ2
A2
A10
A14
A22
A30
DQ3
A3
A11
A15
A23
A31
DQ4
A4
0
A16
A24
0
DQ5
A5
0
A17
A25
0
Table 4: Address Cycle Map (x8)
DQ6
A6
0
A18
A26
0
DQ7
A7
0
A19
A27
0
(*): A30 for 8Gbit DDP(1CE). A30:A31 for 16Gbit QDP(1CE).
As far as the address bits are concerned, the following rules apply:
A0 - A11 : column address in the page
A12 - A17 : page address in the block
A18 : plane address (for multi-plane operations) / block address (for normal operations)
A19 - A31 : block address
1^st Cycle
2^nd Cycle
3^rd Cycle
4^th Cycle
5^th Cycle (*)
DQ0
A0
A8
A11
A19
A27
DQ1
A1
A9
A12
A20
A28
DQ2
A2
A10
A13
A21
A29
DQ3
A3
0
A14
A22
A30
DQ4
A4
0
A15
A23
0
DQ5
A5
0
A16
A24
0
Table 5: Address Cycle Map (x16)
DQ6
A6
0
A17
A25
0
DQ7
A7
0
A18
A26
0
(*): A29 for 8Gbit DDP(1CE). A29:A30 for 16Gbit QDP(1CE)
As far as the address bits are concerned, the following rules apply:
A0 - A10 : column address in the page
A11 - A16 : page address in the block
A17 : plane address (for multi-plane operations) / block address (for normal operations)
A18 - A30 : block address
Rev 1.4 / OCT. 2010
*ba53f20d-240c*
10
B34416/177.179.157.84/2010-10-08 10:08