MC9S12XF512_1 Datasheet, PDF (950/1306 Pages) Freescale Semiconductor, Inc – S12X Microcontrollers

Chapter 20 Pulse Width Modulator with Fault Protection (PMF15B6C) Module
HALF = 1, LDFQ[3:0] = 00 = RELOAD EVERY HALF-CYCLE
UP/DOWN
COUNTER
LDOK = 1
0
0
1
0
MODULUS = 2
2
3
4
4
PWM VALUE = 1
1
1
1
1
PWMRF = 1
1
1
1
1
1
10 ⁴
12 1
11 1
11
PWM
Figure 20-71. Half-Cycle Center-Aligned Modulus Loading
LDFQ[3:0] = 00 = RELOAD EVERY CYCLE
UP ONLY
COUNTER
LDOK = 1
0
1
0
0
MODULUS = 3
3
3
3
3
PWM VALUE = 1
2
2
1
1
PWMRF = 1
1
1
1
1
PWM
Figure 20-72. Edge-Aligned PWM Value Loading
LDFQ[3:0] = 00 = RELOAD EVERY CYCLE
UP ONLY
COUNTER
LDOK = 1
1
MODULUS = 3
4
PWM VALUE = 2
2
PWMRF = 1
1
1
0
2
1
2
2
1
1
PWM
Figure 20-73. Untitled Figure
20.4.7.4 Initialization
Initialize all registers and set the LDOK bit before setting the PWMEN bit. With LDOK set, setting
PWMEN for the first time after reset, immediately loads the PWM generator thereby setting the PWMRF
flag. PWMRF generates a CPU interrupt request if the PWMRIE bit is set. In complementary channel
MC9S12XF - Family Reference Manual, Rev.1.19
950
Freescale Semiconductor