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MC9S12XF512_1 Datasheet, PDF (1024/1306 Pages) Freescale Semiconductor, Inc – S12X Microcontrollers
Chapter 22 Enhanced Programmable Interrupt Timer (S12XEPIT24B8CV1)
22.4.0.10 PIT Channel Stop Register (PITCSTP)
Module Base + 0x0028
R
W
Reset
7
PITCSTP7
0
6
PITCSTP6
0
5
PITCSTP5
0
4
PITCSTP4
0
3
PITCSTP3
0
2
PITCSTP2
0
Figure 22-27. PIT Channel Stop Register (PITCSTP)
1
PITCSTP1
0
0
PITCSTP0
0
Read: Anytime
Write: Anytime
Table 22-10. PITCSTP Field Descriptions
Field
7:0
PITCSTP
Description
PIT Channel Stop — If cleared, the corresponding PIT channel normally restarts after a time-out event. If set,
the corresponding PIT channel stops after the next time-out event. Once a channel has been stopped, the
channels waits for a force-load event (i.e. writing a one to the corresponding PITFLT bit) to restart. Additionally,
if the channel is in externally triggered mode, an input trigger event also restarts the channel.
The information in this register is “pipe-lined”, i.e. it is transferred to internal configuration bits every time the
counter of the corresponding PIT channel restarts. This way, the current state of the PITCSTP bit (together with
the corresponding counter value in the PITLD register) always reflects the configuration of the PIT channel after
a restart (and defines the state of the PIT channel after the time-out event following the restart).
0 The PIT channel restarts after the next time-out event.
1 The PIT channel stops after the next time-out event.
22.4.0.11 PIT Combined Output Trigger Configuration Register (PITTRIGOUT)
Module Base + 0x0029
7
R
PITCOTE7
W
Reset
0
6
PITCOTE6
0
5
PITCOTE5
0
4
PITCOTE4
0
3
PITCOTE3
0
2
PITCOTE2
0
1
PITCOTE1
0
0
PITCOTE0
0
Figure 22-28. PIT Combined Output Trigger Configuration Register (PITTRIGOUT)
Read: Anytime
Write: Anytime
Table 22-11. PITTRIGOUT Field Descriptions
Field
7:0
PITCOTE
Description
PIT Combined Output Trigger Enable — If set, the time-out event of the corresponding PIT channel
contributes to the generation of the combined trigger output. This is used to trigger other modules on
programmable timing event sequences.
0 The time-out event of the corresponding PIT channel does not contribute to the combined trigger output.
1 The time-out event of the corresponding PIT channel contributes to the combined trigger output.
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MC9S12XF - Family Reference Manual, Rev.1.19
Freescale Semiconductor