MC9S12XF512_1 Datasheet, PDF (1019/1306 Pages) Freescale Semiconductor, Inc – S12X Microcontrollers

Chapter 22 Enhanced Programmable Interrupt Timer (S12XEPIT24B8CV1)
Table 22-4. PITMUX Field Descriptions
Field
Description
7:0
PIT Multiplex Bits for Timer Channel 7:0 — These bits select if the corresponding 16-bit timer is connected to
PITMUX[7:0] micro time base 1 or 0. If PITMUX is modified, the corresponding 16-bit timer is immediately switched to the other
micro time base. If a PIT channel is in external trigger mode (i.e. the corresponding bit in the PITTRIGE register
is set), the corresponding PITMUX bit for this channel is ignored. The time base for a PIT channel in external
trigger mode is the bus clock.
0 The corresponding 16-bit timer counts with micro time base 0.
1 The corresponding 16-bit timer counts with micro time base 1.
22.4.0.5 PIT Interrupt Enable Register (PITINTE)
Module Base + 0x0004
R
W
Reset
7
PITINTE7
0
6
PITINTE6
5
PITINTE5
4
PITINTE4
3
PITINTE3
2
PITINTE2
0
0
0
0
0
Figure 22-7. PIT Interrupt Enable Register (PITINTE)
Read: Anytime
Write: Anytime
Table 22-5. PITINTE Field Descriptions
1
PITINTE1
0
0
PITINTE0
0
Field
7:0
PITINTE
[7:0]
Description
PIT Time-out Interrupt Enable Bits for Timer Channel 7:0 — These bits enable an interrupt service request
whenever the time-out flag PITTF of the corresponding PIT channel is set. When an interrupt is pending (PITTF
set) setting this bit will immediately cause an interrupt. To avoid this, the corresponding PITTF flag has to be
cleared first.
0 Interrupt of the corresponding PIT channel is disabled.
1 Interrupt of the corresponding PIT channel is enabled.
22.4.0.6 PIT Time-Out Flag Register (PITTF)
Module Base + 0x0005
R
W
Reset
7
PITTF7
0
6
PITTF6
5
PITTF5
4
PITTF4
3
PITTF3
2
PITTF2
0
0
0
0
0
Figure 22-8. PIT Time-Out Flag Register (PITTF)
Read: Anytime
Write: Anytime (write one to clear)
1
PITTF1
0
0
PITTF0
0
Freescale Semiconductor
MC9S12XF - Family Reference Manual, Rev.1.19
1019