MC9S12XF512_1 Datasheet, PDF (158/1306 Pages) Freescale Semiconductor, Inc – S12X Microcontrollers

Chapter 4 384 KByte Flash Module (S12XFTM384K2V1)
Table 4-26. FCCOB - NVM Command Mode (Typical Usage)
CCOBIX[2:0]
011
100
101
Byte
HI
LO
HI
LO
HI
LO
FCCOB Parameter Fields (NVM Command Mode)
Data 1 [15:8]
Data 1 [7:0]
Data 2 [15:8]
Data 2 [7:0]
Data 3 [15:8]
Data 3 [7:0]
4.3.2.12 EEE Tag Counter Register (ETAG)
The ETAG register contains the number of outstanding words in the buffer RAM EEE partition that need
to be programmed into the D-Flash EEE partition. The ETAG register is decremented prior to the related
tagged word being programmed into the D-Flash EEE partition. All tagged words have been programmed
into the D-Flash EEE partition once all bits in the ETAG register read 0 and the MGBUSY flag in the
FSTAT register reads 0.
Offset Module Base + 0x000C
7
6
5
4
3
2
1
0
R
ETAG[15:8]
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-18. EEE Tag Counter High Register (ETAGHI)
Offset Module Base + 0x000D
7
6
5
4
3
2
1
0
R
ETAG[7:0]
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-19. EEE Tag Counter Low Register (ETAGLO)
All ETAG bits are readable but not writable and are cleared by the Memory Controller.
4.3.2.13 Flash ECC Error Results Register (FECCR)
The FECCR registers contain the result of a detected ECC fault for both single bit and double bit faults.
The FECCR register provides access to several ECC related fields as defined by the ECCRIX index bits
in the FECCRIX register (see Section 4.3.2.4). Once ECC fault information has been stored, no other fault
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