MC9S12XF512_1 Datasheet, PDF (457/1306 Pages) Freescale Semiconductor, Inc – S12X Microcontrollers

Chapter 13 FlexRay Communication Controller (FLEXRAY)
Revision History
Rev. No.
1.4
Revision
Date
20 Aug
2006
Effective
Date
31 Aug
2006
1.5
7 Nov
7 Nov
2006
2006
1.6
02 Feb 07 02 Feb 07
13.1 Introduction
Author
Summary of Changes
Added lower bit rate description
add pe-pll description
fixed PSR1[APTAC] description
updated calculation of message buffers that can be used
renamed PRESCALE field in MCR to BITRATE
Module Configuration Register (MCR)
- updated description of CLKSEL bit
Section 13.6.7, “Individual Message Buffer Search”
- split message buffer priority table into static / dynamic segment
- add statement of rx tx buffer pair in dynamic segment
Section 13.6.3.7.2, “Receive FIFO Control Data”
- removed Note on empty receive fifo update issue
- added statement, that empty fifo can not be updated
Section 13.6.7, “Individual Message Buffer Search”
- major update
Section 13.7.6, “Message Buffer Search on Simple Message Buffer
Configuration”
- added to illustrate message buffer search
Section 13.7.2, “Shut Down Sequence”
- simplified description
Section 13.1.6.3, “Stop Mode”
- make shutdown mandatory
added w1c indication to all flag bits, added rwm to CMT bit
added flexray bus related minimum chi frequency
Section 13.1.6, “Modes of Operation”
- updated desciption
Section 13.3, “Controller Host Interface Clocking”
- added and provide minimum chi frequency
Section 13.7.1, “Initialization Sequence
-updated, changed shutdown sequence
13.1.1 Reference
The following documents are referenced.
• FlexRay Communications System Protocol Specification, Version 2.1 Rev A
MC9S12XF - Family Reference Manual, Rev.1.19
Freescale Semiconductor
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