MC9S12XF512_1 Datasheet, PDF (943/1306 Pages) Freescale Semiconductor, Inc – S12X Microcontrollers

Chapter 20 Pulse Width Modulator with Fault Protection (PMF15B6C) Module
PWM CONTROLLED BY
ODD PWMVAL REGISTER
PWM CONTROLLED BY
EVEN PWMVAL REGISTER
INITIAL VALUE = 0
A
B
A/B
DEADTIME
GENERATOR
ISx PIN
IN DEADTIME
D
Q
CLK
D
Q
CLK
TOP PWM
BOTTOM PWM
PWM CYCLE START
Figure 20-57. Internal Correction Logic when ISENS = 10
PWM CONTROLLED BY
ODD PWMVAL REGISTER
PWM CONTROLLED BY
EVEN PWMVAL REGISTER
INITIAL VALUE = 0
A
B
A/B
DEADTIME
GENERATOR
ISx PIN
PMFCNT = PMFMOD
D
Q
CLK
D
Q
CLK
TOP PWM
BOTTOM PWM
PWM CYCLE START
Figure 20-58. Internal Correction Logic when ISENS = 11
NOTE
Values latched on the ISx pins are buffered so only one PWM register is
used per PWM cycle. If a current status changes during a PWM period, the
new value does not take effect until the next PWM period.
When initially enabled by setting the PWMEN bit, no current status has previously been sampled. PWM
value registers one, three, and five initially control the three PWM pairs when configured for current status
correction.
DESIRED LOAD VOLTAGE
TOP PWM
BOTTOM PWM
LOAD VOLTAGE
Figure 20-59. Correction with Positive Current
MC9S12XF - Family Reference Manual, Rev.1.19
Freescale Semiconductor
943