MC68HC08LT8 Datasheet, PDF (73/156 Pages) Freescale Semiconductor, Inc – Microcontrollers

PPI1 Status and Control Register (PPI1SCR)
7.6 PPI1 Status and Control Register (PPI1SCR)
The PPI1 status and control register (PPI1SCR) controls and monitors the operation of the PPI module.
Address:
Read:
Write:
Reset:
$0019
Bit 7
6
5
4
3
0
PPI1L PPI1MSK PPICLKS1 PPI1CLKS0
2
PPI1IE2
1
PPI1IE1
0
0
1
0
0
0
0
Figure 7-2. PPI1 Status and Control Register (PPI1SCR)
Bit 0
PPI1IE0
0
PPI1L — PPI1 Interrupt Flag
This read/write bit indicates a interrupt request is generated by PPI1 and is pending for
acknowledgement. This bit generates an interrupt to the CPU if PPI1MSK=0.
The PPI1L bit is cleared by writing logic 1 to it.
1 = Read: PPI1 interrupt request is pending / Write: PPI1 interrupt acknowledge
0 = No PPI1 interrupt request is pending
PPI1MSK — PPI1 Interrupt Mask
Writing a logic one to this read/write bit disables PPI1 interrupt requests. Reset clears PPI1MSK.
1 = PPI1 interrupt requests disabled
0 = PPI1 interrupt requests enabled
PPI1CLKS[1:0] — PPI1 Clock Source Select Bits
These two bits select the clock source for the PPI.
Table 7-1. PPI1 Clock Source Selection
PPI1CLKS[1:0]
00
01
10
11
Clock Source for PPI1
Reserved
External clock from PPIECK pin
32KXCLK from OSC module
Reserved
PPI1IE[2:0] —PPI1 Interrupt Period Select Bits
These three bits select the PPI interrupt period. The PPI is disabled when PPI1IE[2:0] are zero and no
interrupts are generated.
Table 7-2. PPI1 Interrupt Period Selection
PPI1IE[2:0]
000
001
010
011
100
101
110
111
Interrupt Period
PPI and its associated interrupts are disabled
512 PPI counts
1,024 PPI counts
2,048 PPI counts
4,096 PPI counts
8,192 PPI counts
16,384 PPI counts
32,768 PPI counts
MC68HC08LT8 Data Sheet, Rev. 1
Freescale Semiconductor
73