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MC68HC08LT8 Datasheet, PDF (147/156 Pages) Freescale Semiconductor, Inc – Microcontrollers
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2-V DC Electrical Characteristics
16.7 2-V DC Electrical Characteristics
Table 16-6. DC Electrical Characteristics (2V)
Characteristic(1)
Output high voltage (ILOAD = –0.4 mA)
All ports
Output low voltage
(ILOAD = 0.5mA) All ports except PTB2–PTB3
(ILOAD = 8mA) PTB2–PTB3
Input high voltage
All ports, RST, IRQ, OSC1
Input low voltage
All ports, RST, IRQ, OSC1
Symbol
VOH
Min
VDD– 0.5
Typ(2)
—
Max
—
Unit
V
VOL
—
—
0.5
V
VIH
0.7 × VDD
—
VDD
V
VIL
VSS
—
0.3 × VDD
V
VDD supply current, fOP = 1MHz (RLCD = 146kΩ)
Run(3)
with all modules on
Wait(4)
with all modules off, except PPI, LCD, and LVI
Stop(5)
–40 to 85°C (All modules off)
25°C (XTAL, LCD, PPI enabled)
25°C (XTAL, LCD, PPI, LVI enabled)
25°C (XTAL, LCD, PPI, LVI, OSC enabled)
Digital I/O ports Hi-Z leakage current
Input current
Capacitance
Ports (as input or output)
POR rearm voltage(6)
POR rise time ramp rate(7)
Monitor mode entry voltage
Pullup resistors(8)
PTA0–PTA3 as KBI0–KBI3, RST, IRQ
—
0.8
IDD
—
0.6
—
0.2
—
5
—
147
—
0.5
IIL
—
—
IIN
—
—
COUT
—
—
CIN
—
—
VPOR
750
—
RPOR
0.02
—
VTST
VDD + 2.5
—
RPU
50
100
2
mA
1.8
mA
1
µA
15
µA
155
µA
1
mA
± 10
µA
±1
µA
12
8
pF
—
mV
—
V/ms
9.1
V
200
kΩ
1. VDD = 1.8 to 2.2 Vdc, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted.
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) IDD measured using external square wave clock source (fOP = 1 MHz). All inputs 0.2V from rail. No dc loads.
Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects
run IDD. Measured with all modules enabled.
4. Wait IDD measured using external square wave clock source (fOP = 1 MHz). All inputs 0.2V from rail. No dc loads. Less than
100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait IDD.
5. Stop IDD measured with OSC1 grounded; no port pins sourcing current.
6. Maximum is highest voltage that POR is guaranteed.
7. If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until minimum
VDD is reached.
8. RPU is measured at VDD = 5.0V.
MC68HC08LT8 Data Sheet, Rev. 1
Freescale Semiconductor
147
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