MC68HC08LT8 Datasheet, PDF(146/156 Page) Freescale Semiconductor, Inc

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MC68HC08LT8 Datasheet, PDF (146/156 Pages) Freescale Semiconductor, Inc – Microcontrollers

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Electrical Specifications

16.6 3-V DC Electrical Characteristics

Table 16-5. DC Electrical Characteristics (3V)

Characteristic(1)

Symbol

Min

Typ(2)

Max

Unit

Output high voltage (ILOAD = â0.4 mA)

All ports

VOH

VDDâ 0.7

Output low voltage

(ILOAD = 0.5mA) All ports except PTB2âPTB3

(ILOAD = 10mA) PTB2âPTB3

Input high voltage

All ports, RST, IRQ, OSC1

VOL

VIH

0.7 Ã VDD

0.7

VDD

Input low voltage

All ports, RST, IRQ, OSC1

VIL

VSS

0.3 Ã VDD

VDD supply current, fOP = 2MHz (RLCD = 146kâ¦)

Run(3)

with all modules on

Wait(4)

with all modules off, except PPI, LCD, and LVI

Stop(5)

â40 to 85Â°C (All modules off)

25Â°C (XTAL, LCD, PPI enabled)

25Â°C (XTAL, LCD, PPI, LVI enabled)

25Â°C (XTAL, LCD, PPI, LVI, OSC enabled)

IDD

0.2

ÂµA

150

165

ÂµA

Digital I/O ports Hi-Z leakage current

Input current

Capacitance

Ports (as input or output)

POR rearm voltage(6)

IIL

Â± 10

ÂµA

IIN

Â±1

ÂµA

COUT

CIN

VPOR

750

POR rise time ramp rate(7)

Monitor mode entry voltage

Pullup resistors(8)

PTA0âPTA3 as KBI0âKBI3, RST, IRQ

RPOR

0.02

VTST

VDD + 2.5

RPU

100

V/ms

9.1

200

kâ¦

Low-voltage inhibit, trip falling voltage

Low-voltage inhibit, trip rising voltage

Low-voltage inhibit reset/recovery hysteresis

VTRIPF

VTRIPR

VHYS

1.80

1.85

1.90

2.00

1.97

2.10

1. VDD = 2.7 to 3.3 Vdc, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted.

2. Typical values reflect average measurements at midpoint of voltage range, 25 Â°C only.

3. Run (operating) IDD measured using external square wave clock source (fOP = 2 MHz). All inputs 0.2V from rail. No dc loads.

Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects

run IDD. Measured with all modules enabled.

4. Wait IDD measured using external square wave clock source (fOP = 2 MHz). All inputs 0.2V from rail. No dc loads. Less than

100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait IDD.

5. Stop IDD measured with OSC1 grounded; no port pins sourcing current.

6. Maximum is highest voltage that POR is guaranteed.

7. If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until minimum

VDD is reached.

8. RPU is measured at VDD = 5.0V.

MC68HC08LT8 Data Sheet, Rev. 1

146

Freescale Semiconductor

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