MC68HC08LT8 Datasheet, PDF (35/156 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 4
System Integration Module (SIM)
4.1 Introduction
This section describes the system integration module (SIM). Together with the CPU, the SIM controls all
MCU activities. The SIM is a system state controller that coordinates CPU and exception timing. The SIM
is responsible for:
• Bus clock generation and control for CPU and peripherals:
– Stop/wait/reset/break entry and recovery
– Internal clock control
• Master reset control, including power-on reset (POR) and COP timeout
• Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
• CPU enable/disable timing
• Modular architecture expandable to 128 interrupt sources
Signal Name
CGMXCLK
IAB
IDB
PORRST
IRST
R/W
Table 4-1. Signal Name Conventions
Description
Oscillator clock from oscillator module
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
MC68HC08LT8 Data Sheet, Rev. 1
Freescale Semiconductor
35