MC68HC08LT8 Datasheet, PDF (140/156 Pages) Freescale Semiconductor, Inc – Microcontrollers

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15.2.2.2 Break Address Registers
The break address registers contain the high and low bytes of the desired breakpoint address. Reset
clears the break address registers.
Address: $FE0C
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
14
13
12
11
10
Write:
9
Bit 8
Reset: 0
0
0
0
0
0
0
0
Figure 15-3. Break Address Register High (BRKH)
Address: $FE0D
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 15-4. Break Address Register Low (BRKL)
15.2.2.3 Break Status Register
The break status register contains a flag to indicate that a break caused an exit from stop or wait mode.
Address: $FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
R
Write:
R
R
R
R
R
Note⁽¹⁾
R
Reset:
0
R = Reserved
1. Writing a logic zero clears SBSW.
Figure 15-5. Break Status Register (BSR)
SBSW — SIM Break Stop/Wait
This status bit is useful in applications requiring a return to wait or stop mode after exiting from a break
interrupt. Clear SBSW by writing a logic zero to it. Reset clears SBSW.
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
MC68HC08LT8 Data Sheet, Rev. 1
140
Freescale Semiconductor