MC68HC08LT8 Datasheet, PDF (34/156 Pages) Freescale Semiconductor, Inc – Microcontrollers

Configuration Register (CONFIG)
PEE — Port E Enable for LCD Drive
Setting PEE configures the PTE0/FP3–PTE7/FP10 pins for LCD frontplane driver use.
Reset clears this bit.
1 = PTE0/FP3–PTE7/FP10 pins configured as LCD frontplane driver pins: FP3–FP10
0 = PTE0/FP3–PTE7/FP10 pins configured as standard I/O pins: PTE0–PTE7
PDE — Port D Enable for LCD Drive
Setting PDE configures the PTD0/FP11–PTD7/FP18 pins for LCD frontplane driver use.
Reset clears this bit.
1 = PTD0/FP11–PTD7/FP18 pins configured as LCD frontplane driver pins: FP11–FP18
0 = PTD0/FP11–PTD7/FP18 pins configured as standard I/O pins: PTD0–PTD7
PCEH — Port C High Nibble Enable for LCD Drive
Setting PCEH configures the PTC4/FP23–PTC5/FP24 pins for LCD frontplane driver use. Reset clears
this bit.
1 = PTC4/FP23–PTC5/FP24 pins configured as LCD frontplane driver pins: FP23–FP24
0 = PTC4/FP23–PTC5/FP24 pins configured as standard I/O pins: PTC4–PTC5
PCEL — Port C Low Nibble Enable for LCD Drive
Setting PCEL configures the PTC0/FP19–PTC3/FP22 pins for LCD frontplane driver use. Reset clears
this bit.
1 = PTC0/FP19–PTC3/FP22 pins configured as LCD frontplane driver pins: FP19–FP22
0 = PTC0/FP19–PTC3/FP22 pins configured as standard I/O pins: PTC0–PTC3
LVISEL1, LVISEL0 — LVI Trip Voltage Selection
These two bits determine at which level of V_DD the LVI module will come into action. LVISEL1 and
LVISEL0 are set to the default configuration by a power-on reset only.
Table 3-1. Trip Voltage Selection
LVISEL1
0
0
1
1
LVISEL0
0
1
0
1
Comments⁽¹⁾
Reserved
For V_DD = 3 V operation
(default after POR)
For V_DD = 5 V operation
Reserved
1. See Chapter 16 Electrical Specifications for full parameters.
MC68HC08LT8 Data Sheet, Rev. 1
34
Freescale Semiconductor