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| MC9S08RC8 Datasheet, PDF (62/234 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Resets, Interrupts, and System Conï¬guration
Table 5-1. Vector Summary
Vector Vector
Address
Priority Number (High/Low)
Vector Name
Module
Source
Enable
Description
Lower
16
through
31
$FFC0/FFC1
through
$FFDE/FFDF
15
$FFE0/FFE1
14
$FFE2/FFE3
13
$FFE4/FFE5
12
$FFE6/FFE7
11
$FFE8/FFE9
10
$FFEA/FFEB
9
$FFEC/FFED
8
$FFEE/FFEF
7
$FFF0/FFF1
6
$FFF2/FFF3
5
$FFF4/FFF5
4
$FFF6/FFF7
3
$FFF8/FFF9
2
$FFFA/FFFB
1
$FFFC/FFFD
Higher
0
$FFFE/FFFF
Vspi1
Vrti
Vkeyboard2
Vkeyboard1
Vacmp1
Vcmt
Vsci1tx
Vsci1rx
Vsci1err
Vtpm1ovf
Vtpm1ch1
Vtpm1ch0
Virq
Vlvd
Vswi
Vreset
Unused Vector Space
(available for user program)
SPI(1)
System
control
KBI2
KBI1
ACMP(2)
CMT
SCI(3)
SCI(3)
SCI(3)
TPM
TPM
TPM
IRQ
System
control
Core
System
control
SPIF
MODF
SPTEF
RTIF
KBF
KBF
ACF
EOCF
TDRE
TC
IDLE
RDRF
OR
NF
FE
PF
TOF
CH1F
CH0F
IRQF
LVDF
SWI
Instruction
COP
LVD
RESET pin
Illegal opcode
Illegal address
SPIE
SPIE
SPTIE
RTIE
KBIE
KBIE
ACIE
EOCIE
TIE
TCIE
ILIE
RIE
ORIE
NFIE
FEIE
PFIE
TOIE
CH1IE
CH0IE
IRQIE
LVDIE
â
COPE
LVDRE
RSTPE
â
â
SPI
Real-time interrupt
Keyboard 2 pins
Keyboard 1 pins
ACMP compare
CMT
SCI transmit
SCI receive
SCI error
TPM overï¬ow
TPM channel 1
TPM channel 0
IRQ pin
Low-voltage detect
Software interrupt
Watchdog timer
Low-voltage detect
External pin
Illegal opcode
Illegal address
1. The SPI module is not included on the MC9S08RC/RD/RE devices. This vector location is unused for those devices.
2. The analog comparator (ACMP) module is not included on the MC9S08RD devices. This vector location is unused for those
devices.
3. The SCI module is not included on the MC9S08RC devices. This vector location is unused for those devices.
5.6 Low-Voltage Detect (LVD) System
The MC9S08RC/RD/RE/RG includes a system to protect against low-voltage conditions in order to
protect memory contents and control MCU system states during supply voltage variations. The system is
comprised of a power-on reset (POR) circuit, an LVD circuit with ï¬ag bits for warning and detection, and
a mechanism for entering a system safe state following an LVD interrupt. The LVD circuit can be
conï¬gured to generate an interrupt or a reset when low supply voltage has been detected.
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
62
Freescale Semiconductor
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