MC9S08RC8 Datasheet, PDF (215/234 Pages) Freescale Semiconductor, Inc – Microcontrollers

Electrical Characteristics
Table A-11. SPI Electrical Characteristic
Number⁽¹⁾
Characteristic⁽²⁾
Symbol
Min
Max
Unit
Operating frequency⁽³⁾
Master
f_op
f_Bus/2048
f_Bus/2
Hz
Slave
f_op
dc
f_Bus/4
1
Cycle time
Master t_SCK
2
Slave _tSCK
4
2048
t_cyc
—
t_cyc
2
Enable lead time
Master _tLead
—
Slave _tLead
1/2
1/2
t_SCK
—
t_SCK
3
Enable lag time
Master _tLag
—
Slave _tLag
1/2
1/2
t_SCK
—
t_SCK
4
Clock (SPSCK) high time
Master and Slave
t_SCKH ^{1/2 t}SCK ^{– 25}
—
ns
5
Clock (SPSCK) low time
Master and Slave
t_SCKL ^{1/2 t}SCK ^{– 25}
—
ns
6
Data setup time (inputs)
Master _tSI(M)
30
Slave _tSI(S)
30
—
ns
—
ns
7
Data hold time (inputs)
Master _tHI(M)
30
Slave _tHI(S)
30
8
Access time, slave⁽⁴⁾
t_A
0
9
Disable time, slave⁽⁵⁾
t_dis
—
—
ns
—
ns
40
ns
40
ns
10 Data setup time (outputs)
Master _tSO
25
Slave _tSO
25
—
ns
—
ns
11 Data hold time (outputs)
Master _tHO
–10
Slave _tHO
–10
—
ns
—
ns
1. Refer to Figure A-11 through Figure A-14.
2. All timing is shown with respect to 20% V_DD and 70% V_DD, unless noted; 100 pF load on all
SPI pins. All timing assumes slew rate control disabled and high drive strength enabled for SPI
output pins.
3. Maximum baud rate must be limited to 5 MHz due to pad input characteristics.
4. Time to data active from high-impedance state.
5. Hold time to high-impedance state.
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Freescale Semiconductor
215