MC9S08RC8 Datasheet, PDF (144/234 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer/PWM (TPM)
In input capture mode, reading either byte (TPM1CnVH or TPM1CnVL) latches the contents of both bytes
into a buffer where they remain latched until the other byte is read. This latching mechanism also resets
(becomes unlatched) when the TPM1CnSC register is written.
In output compare or PWM modes, writing to either byte (TPM1CnVH or TPM1CnVL) latches the value
into a buffer. When both bytes have been written, they are transferred as a coherent 16-bit value into the
timer channel value registers. This latching mechanism may be manually reset by writing to the
TPM1CnSC register.
This latching mechanism allows coherent 16-bit writes in either order, which is friendly to various
compiler implementations.
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
144
Freescale Semiconductor