MC9S08RC8 Datasheet, PDF (118/234 Pages) Freescale Semiconductor, Inc – Microcontrollers

Carrier Modulator Transmitter (CMT) Block Description
8.5.8 Background Mode Operation
When the microcontroller is in active background mode, the CMT temporarily suspends all counting until
the microcontroller returns to normal user mode.
8.6 CMT Registers and Control Bits
The following registers control and monitor CMT operation:
• CMT carrier generator data registers (CMTCGH1, CMTCGL1, CMTCGH2, CMTCGL2)
• CMT output control register (CMTOC)
• CMT modulator status and control register (CMTMSC)
• CMT modulator period data registers (CMTCMD1, CMTCMD2, CMTCMD3, CMTCMD4)
8.6.1 Carrier Generator Data Registers (CMTCGH1, CMTCGL1,
CMTCGH2, and CMTCGL2)
The carrier generator data registers contain the primary and secondary high and low values for generating
the carrier output.
7
R
PH7
W
6
PH6
5
PH5
4
PH4
3
PH3
2
PH2
1
PH1
0
PH0
Reset
u
u
u
u
u
u
u
u
u = Unaffected
Figure 8-8. Carrier Generator Data Register High 1(CMTCGH1)
Table 8-3. CMTCGH1 Field Descriptions
Field
7:0
PH[7:0]
Description
Primary Carrier High Time Data Values — When selected, these bits contain the number of input clocks
required to generate the carrier high and low time periods. When operating in time mode (see Section 8.5.2.1,
“Time Mode”), this register pair is always selected. When operating in FSK mode (see Section 8.5.2.3, “FSK
Mode”), this register pair and the secondary register pair are alternatively selected under control of the
modulator. The primary carrier high and low time values are unaffected out of reset. These bits must be written
to nonzero values before the carrier generator is enabled to avoid spurious results.
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
118
Freescale Semiconductor