MC9S08RC8 Datasheet, PDF (31/234 Pages) Freescale Semiconductor, Inc – Microcontrollers

Modes of Operation
3.6 Stop Modes
One of three stop modes is entered upon execution of a STOP instruction when the STOPE bit in the
system option register is set. In all stop modes, all internal clocks are halted. If the STOPE bit is not set
when the CPU executes a STOP instruction, the MCU will not enter any of the stop modes and an illegal
opcode reset is forced. The stop modes are selected by setting the appropriate bits in SPMSC2.
Table 3-1 summarizes the behavior of the MCU in each of the stop modes.
Table 3-1. Stop Mode Behavior
Mode
Stop1
Stop2
PDC
1
1
PPDC
0
1
CPU, Digital
Peripherals,
FLASH
Off
Off
RAM
Off
Standby
Stop3
0
Don’t
Standby
care
Standby
OSC
Off
Off
Off
ACMP Regulator I/O Pins
RTI
Standby
Standby
Standby
Standby
Standby
Standby
Reset
States
held
States
held
Off
Optionally on
Optionally on
3.6.1 Stop1 Mode
Stop1 mode provides the lowest possible standby power consumption by causing the internal circuitry of
the MCU to be powered down. To enter stop1, the user must execute a STOP instruction with the PDC bit
in SPMSC2 set and the PPDC bit clear. Stop1 can be entered only if the LVD reset is disabled
(LVDRE = 0).
When the MCU is in stop1 mode, all internal circuits that are powered from the voltage regulator are turned
off. The voltage regulator is in a low-power standby state, as are the OSC and ACMP.
Exit from stop1 is done by asserting any of the wakeup pins on the MCU: RESET, IRQ, or KBI1, which
have been enabled. IRQ and KBI pins are always active-low when used as wakeup pins in stop1 regardless
of how they were configured before entering stop1.
Upon wakeup from stop1 mode, the MCU will start up as from a power-on reset (POR). The CPU will take
the reset vector.
3.6.2 Stop2 Mode
Stop2 mode provides very low standby power consumption and maintains the contents of RAM and the
current state of all of the I/O pins. To select entry into stop2 upon execution of a STOP instruction, the user
must execute a STOP instruction with the PPDC and PDC bits in SPMSC2 set. Stop2 can be entered only
if LVDRE = 0.
Before entering stop2 mode, the user must save the contents of the I/O port registers, as well as any other
memory-mapped registers that they want to restore after exit of stop2, to locations in RAM. Upon exit from
stop2, these values can be restored by user software.
When the MCU is in stop2 mode, all internal circuits that are powered from the voltage regulator are turned
off, except for the RAM. The voltage regulator is in a low-power standby state, as is the ACMP. Upon entry
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Freescale Semiconductor
31