MC9S08RC8 Datasheet, PDF(163/234 Page) Freescale Semiconductor, Inc – Microcontrollers

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MC9S08RC8 Datasheet, PDF (163/234 Pages) Freescale Semiconductor, Inc – Microcontrollers

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Chapter 13

Serial Peripheral Interface (S08SPIV3)

The SPI is only available on the MC9S08RGxx versions of this family of microcontrollers. The SPI pins

are shared with PTC4-PTC7 port pins. When the SPI is enabled these pins are controlled by the SPI

module.

HCS08 CORE

BDC

CPU

INTERNAL BUS

DEBUG

MODULE (DBG)

7

PTA7/KBI1P7â

PTA1/KBI1P1

PTA0/KBI1P0

NOTES1, 2

HCS08 SYSTEM CONTROL

RESETS AND INTERRUPTS

MODES OF OPERATION

POWER MANAGEMENT

RTI

COP

IRQ

LVD

USER FLASH

(RC/RD/RE/RG60 = 63,364 BYTES)

(RC/RD/RE/RG32 = 32,768 BYTES)

(RC/RD/RE16 = 16,384 BYTES)

(RC/RD/RE8 = 8192 BYTES)

8-BIT KEYBOARD

INTERRUPT MODULE (KBI1)

4-BIT KEYBOARD

INTERRUPT MODULE (KBI2)

SERIAL COMMUNICATIONS

INTERFACE MODULE (SCI1)

ANALOG COMPARATOR

MODULE (ACMP1)

PTB7/TPM1CH1

PTE6

PTB5

PTB4

PTB3

PTB2

PTB1/RxD1

PTB0/TxD1

NOTES 1, 5

PTC7/SS1

PTC6/SPSCK1

PTC5/MISO1

PTC4/MOSI1

PTC3/KBI2P3

PTC2/KBI2P2

PTC1/KBI2P1

PTC0/KBI2P0

NOTE 1

USER RAM

(RC/RD/RE/RG32/60 = 2048 BYTES)

(RC/RD/RE8/16 = 1024 BYTES)

EXTAL

XTAL

LOW-POWER OSCILLATOR

2-CHANNEL TIMER/PWM

MODULE (TPM1)

SERIAL PERIPHERAL

INTERFACE MODULE (SPI1)

PTD6/TPM1CH0

PTD5/ACMP1+

PTD4/ACMP1â

PTD3

PTD2/IRQ

PTD1/RESET

PTD0/BKGD/MS

NOTES

1, 3, 4

VDD

VOLTAGE

VSS

REGULATOR

CARRIER MODULATOR

TIMER MODULE (CMT)

8

PTE7âPTE0 NOTE 1

NOTES:

IRO NOTE 5

1. Port pins are software configurable with pullup device if input port

2. PTA0 does not have a clamp diode to VDD. PTA0 should not be driven above VDD. Also, PTA0 does not pullup to VDD when internal

pullup is enabled.

3. IRQ pin contains software conï¬gurable pullup/pulldown device if IRQ enabled (IRQPE = 1)

4. The RESET pin contains integrated pullup device enabled if reset enabled (RSTPE = 1)

5. High current drive

6. Pins PTA[7:4] contain both pullup and pulldown devices. Pulldown enabled when KBI is enabled (KBIPEn = 1) and rising edge is

selected (KBEDGn = 1).

Figure 13-1. MC9S08RC/RD/RE/RG Block Diagram Highlighting SPI Block and Pins

MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11

Freescale Semiconductor

163

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