MC908JL3ECPE Datasheet, PDF (56/180 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. Once an interrupt is
latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared).
FROM RESET
YES
BREAIKBINTTSEERTR?UPT?
NO
YES
I BIT SET?
NO
IRQ
YES
INTERRUPT?
NO
TIMER
YES
INTERRUPT?
NO
(As many interrupts as exist on chip)
STACK CPU REGISTERS.
SET I BIT.
LOAD PC WITH INTERRUPT VECTOR.
FETCH NEXT
INSTRUCTION
SWI
YES
INSTRUCTION?
NO
RTI
YES
INSTRUCTION?
UNSTACK CPU REGISTERS.
NO
EXECUTE INSTRUCTION.
Figure 5-8. Interrupt Processing
MC68HC908JL3E Family Data Sheet, Rev. 4
56
Freescale Semiconductor