MC908JL3ECPE Datasheet, PDF (50/180 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
STOP/WAIT
CONTROL
SIM
COUNTER
V_DD
INTERNAL
PULL-UP
÷2
CLOCK
CONTROL
CLOCK GENERATORS
RESET
PIN LOGIC
POR CONTROL
RESET PIN CONTROL
SIM RESET STATUS REGISTER
MASTER
RESET
CONTROL
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO OSCILLATOR)
COP CLOCK
2OSCOUT (FROM OSCILLATOR)
OSCOUT (FROM OSCILLATOR)
INTERNAL CLOCKS
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP TIMEOUT (FROM COP MODULE)
USB RESET (FROM USB MODULE)
RESET
INTERRUPT CONTROL
AND PRIORITY DECODE
Figure 5-1. SIM Block Diagram
INTERRUPT SOURCES
CPU INTERFACE
Addr. Register Name
Bit 7
6
5
4
3
$FE00
Read:
Break Status Register
(BSR)
Write:
R
R
R
R
R
Reset: 0
0
0
0
0
Note: Writing a 0 clears SBSW.
Read: POR
PIN
COP
ILOP
ILAD
$FE01
Reset Status Register
(RSR)
Write:
POR: 1
0
0
0
0
$FE02
Read:
Reserved Write:
R
R
R
R
R
Reset:
Read:
$FE03
Break Flag Control
Register (BFCR)
Write:
BCFE
R
R
R
R
Reset: 0
= Unimplemented
R
Figure 5-2. SIM I/O Register Summary
2
1
R
SBSW
NOTE
0
0
MODRST LVI
0
0
R
R
R
R
= Reserved
Bit 0
R
0
0
0
R
R
MC68HC908JL3E Family Data Sheet, Rev. 4
50
Freescale Semiconductor