MC908JL3ECPE Datasheet, PDF (4/180 Pages) Freescale Semiconductor, Inc – Microcontrollers

The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
Date
October 2006
Nov 2004
Dec 2002
May 2002
Revision
Level
4
3
2
1
Description
Table 4-1. Instruction Set Summary — Updated table to include the
WAIT instruction.
5.7.1 Break Status Register (BSR) — Updated for clarity.
5.7.2 Reset Status Register (RSR) — Updated description for clarity.
7.4 Security — Updated to reflect the correct RAM location ($80) to
determine if the security code has been entered correctly.
8.9.1 TIM Status and Control Register (TSC) — Added note to definition
of TSTOP bit.
10.1 Introduction — Added note regarding 20-pin devices.
15.4.3 Break Status Register — Updated for clarity.
Chapter 17 Mechanical Specifications — Updated package drawings to
the latest available.
Added appendix B for ROM parts.
Added appendix C for ADC-less parts.
Added appendix A for low-volt devices.
Updated Monitor Mode Circuit (Figure 7-1) and Monitor Mode Entry
Requirements and Options (Table 7-1) in Monitor ROM section.
First general release.
Page
Number(s)
42
63
64
80
89
103
132
147
159–166
167–170
153–224
76, 77
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MC68HC908JL3E Family Data Sheet, Rev. 4
4
Freescale Semiconductor