MC908JL3ECPE Datasheet, PDF (168/180 Pages) Freescale Semiconductor, Inc – Microcontrollers

B.4 Reserved Registers
The two registers at $FE08 and $FE09 are reserved locations on the MC68H(R)C08JL3E/JK3E.
On the MC68H(R)C908JL3E/JK3E, these two locations are the Flash control register and the Flash block
protect register respectively.
B.5 Mask Option Registers
This section describes the mask option registers (MOR1 and MOR2). The mask option registers enable
or disable the following options:
• Stop mode recovery time (32 × 2OSCOUT cycles or 4096 × 2OSCOUT cycles)
• STOP instruction
• Computer operating properly module (COP)
• COP reset period (COPRS), 8176 × 2OSCOUT or 262,128 × 2OSCOUT
• Enable LVI circuit
• Select LVI trip voltage
B.5.1 Functional Description
The mask options are hard-wired connections, specified at the same time as the ROM code, which allow
the user to customize the MCU.
B.5.2 Mask Option Register 1 (MOR1)
Address: $001F
Bit 7
6
Read: COPRS
0
Write:
5
4
3
2
1
0
LVID
0
SSREC STOP
Reset: 0
0
0
0
0
0
0
= Unimplemented
Figure 18-1. Mask Option Register 1 (MOR1)
COPRS — COP reset period selection bit
1 = COP reset cycle is 8176 × 2OSCOUT
0 = COP reset cycle is 262,128 × 2OSCOUT
LVID — Low Voltage Inhibit Disable Bit
1 = Low Voltage Inhibit disabled
0 = Low Voltage Inhibit enabled
Bit 0
COPD
0
MC68HC908JL3E Family Data Sheet, Rev. 4
168
Freescale Semiconductor