MC908JL3ECPE Datasheet, PDF (26/180 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
IF5
IF4
IF3
0
IF1
0
0
$FE04
Interrupt Status Register 1
(INT1)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
Read: IF14
0
0
0
0
0
0
0
$FE05
Interrupt Status Register 2
(INT2)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
Read: 0
0
0
0
0
0
0
IF15
$FE06
Interrupt Status Register 3
(INT3)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
$FE07
Read:
R
R
R
R
R
R
R
R
Reserved Write:
$FE08
$FE09
$FE0A
↓
$FE0B
$FE0C
$FE0D
$FE0E
Read:
Flash Control Register
(FLCR)
Write:
Reset:
Read:
Flash Block Protect
Register (FLBPR)
Write:
Reset:
Read:
Reserved Write:
0
0
BPR7
0
R
Read:
Break Address High
Register (BRKH)
Write:
Reset:
Read:
Break Address Low
Register (BRKL)
Write:
Reset:
Read:
Break Status and Control
Register (BRKSCR)
Write:
Reset:
Bit15
0
Bit7
0
BRKE
0
0
0
BPR6
0
R
Bit14
0
Bit6
0
BRKA
0
0
0
BPR5
0
R
Bit13
0
Bit5
0
0
0
0
0
BPR4
0
R
Bit12
0
Bit4
0
0
0
HVEN
0
BPR3
0
R
Bit11
0
Bit3
0
0
0
MASS
0
BPR2
0
R
ERASE
0
BPR1
0
R
PGM
0
BPR0
0
R
Bit10
Bit9
Bit8
0
0
0
Bit2
Bit1
Bit0
0
0
0
0
0
0
0
0
0
$FFFF
Read:
COP Control Register
(COPCTL)
Write:
Reset:
Low byte of reset vector
Writing clears COP counter (any value)
Unaffected by reset
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 4)
MC68HC908JL3E Family Data Sheet, Rev. 4
26
Freescale Semiconductor