XRT72L54 Datasheet, PDF (41/484 Pages) Exar Corporation – FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
PIN DESCRIPTION
PIN #
PIN NAME
N19
A(5)
N20
A(6)
P1
TxLineClk[3]
P2
RxOutClk[2]/
RxHDLCDat7[2]
P3
DMO[2]
P4
RLOL[3]
P17
WR_RW
P18
A[1]
P19
A[2]
P20
A[3]
R1
RxOutClk[3]/
RxHDLCDat7[3]
R2
DMO[3]
R3
ExtLOS[2]
R4
VDD
R17
VDD
R18
CS
R19
ALE_AS
R20
A(0)
XRT72L54
FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
TYPE
I
I
O
O
I
I
I
I
I
I
O
I
I
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I
I
I
DESCRIPTION
See Description for Pin M20
See Description for Pin M20
See Description for Pin E2
See Description for Pin E3
See Description for Pin C9
See Description for Pin B8
Write Data Strobe (Intel Mode):
If the microprocessor interface is operating in the Intel Mode, then this
active-low input pin functions as the WR (Write Strobe) input signal from
the µP. Once this active-low signal is asserted, then the Framer will latch
the contents of the µP Data Bus, into the addressed register (or RAM
location) within the Framer IC. In the Intel Mode, data gets latched on
the rising edge of WR
R/W Input Pin (Motorola Mode):
When the Microprocessor Interface Section is operating in the Motorola
Mode, then this pin is functionally equivalent to the R/W pin. In the
Motorola Mode, a READ operation occurs if this pin is at a logic "1".
Similarly, a WRITE operation occurs if this pin is at a logic "0".
See Description for Pin M20
See Description for Pin M20
See Description for Pin M20
See Description for Pin E3
See Description for Pin C9
See Description for Pin D9
Power Supply +3.3v ± 5%
Power Supply +3.3v ± 5%
Chip Select Input:
This active-low input signal selects the Microprocessor Interface Sec-
tion of the Framer device and enables READ/WRITE operations
between the Local Microprocessor and the Framer on-chip registers
and RAM locations.
Address Latch Enable/Address Strobe:
This input is used to latch the address (present at the Microprocessor
Interface Address Bus, A(10:0)) into the Framer Microprocessor Inter-
face circuitry and to indicate the start of a READ/WRITE cycle. This
input is active-high in the Intel Mode (MOTO = "low") and active-low in
the Motorola Mode (MOTO = "high").
Address Bus Input (Microprocessor Interface) - LSB (Least Signifi-
cant Bit):
(Please see description for A(10))
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