XRT72L54 Datasheet, PDF (21/484 Pages) Exar Corporation – FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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XRT72L54
FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
ADVANCED CONFIDENTIAL
REV. P1.1.2
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 451
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 452
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 452
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 452
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 453
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 453
RXE3 CONFIGURATION & STATUS REGISTER 1 (ADDRESS = 0X10) ........................................................ 454
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 454
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 454
RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18) ........................................................................... 455
RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18) ........................................................................... 455
7.0 diagnostic operation of the xrt72L54 framer ic .............................................................................. 456
Figure 213. Illustration of the Framer Local Loop-back path, within the XRT72L54 DS3/E3 Framer IC 456
8.0 High Speed HDLC Controller Mode of Operation ........................................................................... 458
8.1 CONFIGURING THE CHANNEL TO OPERATE IN THE HIGH SPEED HDLC CONTROLLER MODE ................................. 458
TABLE 93: ADDRESS LOCATIONS OF EACH OF THE HDLC CONTROL REGISTERS WITHIN THE XRT72L54 DE-
VICE. .................................................................................................................................................... 458
HDLC CONTROL REGISTER (ADDRESS = 0X82) ..................................................................................... 458
8.2 OPERATING THE HIGH SPEED HDLC CONTROLLER ............................................................................................ 458
8.2.1 Operating the Transmit HDLC Controller Block .................................................................................... 459
TABLE 94: DESCRIPTION OF EACH OF THE TRANSMIT HDLC CONTROLLER PINS .................................... 460
Figure 214. A Simple Illustration of an Outbound HDLC Frame, as assembled by the Transmit HDLC Con-
troller, when CRC-32 is selected. ........................................................................................................ 461
Figure 215. A Simple Illustration of an Outbound HDLC Frame, as assembled by the Transmit HDLC Con-
troller, when CRC-16 is selected. ........................................................................................................ 462
8.2.2 Operating the Receive HDLC Controller Block ..................................................................................... 462
TABLE 95: DESCRIPTION OF EACH OF THE RECEIVE HDLC CONTROLLER PINS ...................................... 463
ORDERING INFORMATION ........................................................................................ 464
PACKAGE DIMENSIONS ............................................................................................ 464
REVISION HISTORY ................................................................................................................................ 465
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