XRT72L54 Datasheet, PDF (26/484 Pages) Exar Corporation – FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L54
FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
PIN DESCRIPTION
PIN #
B15
PIN NAME
TxAISEn[0]
B16
TxNib3[1]/
TxHDLCDat3[1]
B17
TxNibFrame[1]/
ValFCS[1]
B18
RxFrame[1]
B19
RxNib0[1]/
RxHDLCDat0[1]
B20
RxNib2[1]/
RxHDLCDat2[1]
C1
TxPOS[0]
C2
TCK
TYPE
I
I
O
O
O
O
O
I
DESCRIPTION
Transmit AIS Command Input:
Setting this input pin "high" configures the Transmit Section to generate
and transmit an AIS Pattern.
Setting this input pin "low" configures the Transmit Section to generate
E3 or DS3 traffic in a normal manner.
See Description for Pin D19
See Description for Pin G17
See Description for Pin F20
See Description for Pin G19
See Description for Pin H18
Transmit Positive Polarity Pulse:
The exact role of this output pin depends upon whether the Framer is
operating in the Unipolar or Bipolar Mode.
Unipolar Mode:
This output pin functions as the "Single-Rail" output signal for the "out-
bound" DS3 or E3 data stream. The signal, at this output pin, will be
updated on the "user-selected" edge of the TxLineClk signal.
Bipolar Mode:
This output pin functions as one of the two dual rail output signals that
commands the sequence of pulses to be driven on the line. TxNEG is
the other output pin. This input is typically connected to the TPDATA
input of the external DS3 or E3 Line Interface Unit IC. When this output
is asserted, it will command the LIU to generate a positive polarity pulse
on the line
Test Clock: Boundary Scan clock input.
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