XRT72L54 Datasheet, PDF (34/484 Pages) Exar Corporation – FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L54
FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
áç
PRELIMINARY
PIN DESCRIPTION
PIN #
E18
PIN NAME
TxSer[0]/
SndMsg[0]
E19
TxOHInd[0]/
TxHDLCDat6[0]
E20
TxFrame[0]
F1
RxLineClk[0]
TYPE
I
O
I
O
I
DESCRIPTION
Transmit Serial Payload Data Input Pin:
The Terminal Equipment is expected to input data, that is intended to be
transmitted to the remote terminal, over an E3 or DS3 transport
medium. The Framer IC will take data, applied to this pin, and insert it
into an outbound "E3 or DS3" frame.
If the XRT72L54 Framer IC has been configured to operate in the "Local
Time" Mode, then it will sample the data (on this pin) upon the rising
edge of "TxInClk". If the XRT72L54 Framer IC has been configured to
operate in the "Loop-Time" Mode, then it will sample the data (on this
pin) upon the rising edge of "RxOutClk".
NOTE: This input pin is active only if the Serial Mode has been selected.
Send Message:
This input is to remain high during the entire duration of the HDLC
packet (including FCS bytes) to be transmitted, when the HDLC control-
ler is turned on.
Transmit Overhead Data Indicator:
This output pin will pulse "high" one-bit period prior to the time that the
Transmit Section of the XRT72L54 device will be processing an Over-
head bit. The purpose of this output pin is to warn the Terminal Equip-
ment that, during the very next bit-period, the XRT72L54 device is going
to be processing an "Overhead" bit and will be ignoring any data that is
applied to the "TxSer" input pin.
NOTE: For DS3 applications, this output pin is only active if the
XRT72L54 device is operating in the "Serial" Mode. This output pin will
be pulled "low" if the device is operating in the "Nibble-Parallel" Mode.
Transmit HDLC Data Input - 6:
This pin accepts bit 6 TxHDLC data when the HDLC controller is turned
on.
Transmit End of DS3 or E3 Frame Indicator:
The Transmit Section of the XRT72L54 device will pulse this output pin
"high" (for one bit-period), when the Transmit Payload Data Input Inter-
face is processing the last bit of a given DS3 or E3 frame.
The purpose of this output pin is to alert the Terminal Equipment that it
needs to begin transmission of a new DS3 or E3 frame to the
XRT72L54 device (e.g., to permit the XRT72L54 device to maintain
Transmit DS3/E3 framing alignment control over the Terminal Equip-
ment).
Receiver LIU (Recovered) Clock:
This input signal serves three purposes:
1. The Receive Framer uses it to sample and "latch" the signals at the
RxPOS and RxNEG input pins (into the Receive Framer circuitry).
2. This input signal functions as the timing reference for the Receive
Framer block.
3. The Transmit Framer block can be configured to use this input signal
as its timing reference.
This signal is the recovered clock from the external DS3/E3 LIU (Line
Interface Unit) IC, which is derived from the incoming DS3/E3 data.
15