XRT72L54 Datasheet, PDF (32/484 Pages) Exar Corporation – FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L54
FOUR CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
PIN DESCRIPTION
PIN #
D18
PIN NAME
TxNib0[0]/
TxHDLCDat0[0]
D19
TxNib3[0]/
TxHDLCDat3[0]
D20
RxClk[0]
TYPE
I
I
O
DESCRIPTION
Transmit Nibble-Parallel Payload Data Input -0:
The Terminal Equipment is expected to input data, that is intended to be
transmitted to the remote terminal, over an E3 or DS3 transport
medium. The Framer IC will take data, applied to this pin (along with
TxNib1, TxNib2, and TxNib3), and insert it into an outbound "E3 or
DS3" frame. The XRT72L54 device will sample the data that is at these
input pins, upon the rising edge of the "TxNibClk" signal.
NOTE: This input pin is active only if the Nibble-Parallel Mode has been
selected.
Transmit HDLC Data Input - 0:
This pin accepts bit 0 TxHDLC data when the HDLC controller is turned
on.
Transmit Nibble-Parallel Payload Data Input -3:
The Terminal Equipment is expected to input data, that is intended to be
transmitted to the remote terminal, over an E3 or DS3 transport
medium. The Framer IC will take data, applied to this pin (along with
TxNib1, TxNib2, and TxNib3), and insert it into an outbound "E3 or
DS3" frame. The XRT72L54 device will sample the data that is at these
input pins, upon the rising edge of the "TxNibClk" signal.
NOTE: This input pin is active only if the Nibble-Parallel Mode has been
selected.
Transmit HDLC Data Input - 3:
This pin accepts bit 3 TxHDLC data when the HDLC controller is turned
on.
Receive Clock Output Signal for Serial and Nibble/Parallel Data
Interface:
The exact behavior of this signal depends upon whether the XRT72L54
device is operating in the "Serial" or in the "Nibble-Parallel-Mode".
Serial Mode Operation:
In the "serial" mode, this signal is a 44.736MHz clock output signal (for
DS3 applications) or 34.368MHz clock output signal (for E3 applica-
tions). The Receive Payload Data Output Interface will update the data
via the RxSer output pin, upon the rising edge of this clock signal.
The user is advised to design (or configure) the Terminal Equipment to
sample the data on the "RxSer" pin, upon the falling edge of this clock
signal.
Nibble-Parallel Mode Operation:
In this Nibble-Parallel Mode, the XRT72L54 device will derive this clock
signal, from the RxLineClk signal. The XRT72L54 device will pulse this
clock signal 1176 times for each "inbound" DS3 frame (or 1074 times for
each inbound “E3/ITU-T G.832” frame, or 384 times for each inbound
“E3/ITU-T G.751 frame). The Receive Payload Data Output Interface
will update the data, on the "RxNib[3:0]" output pins upon the falling
edge of this clock signal.
The user is advised to design (or configure) the Terminal Equipment to
sample the data on the "RxNib[3:0] output pins, upon the rising edge of
this clock signal
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