C8051F326 Datasheet, PDF (98/140 Pages) List of Unclassifed Manufacturers – Full Speed USB, 16 kB Flash MCU Family

C8051F326/7
12.5.1. FIFO Access
Each endpoint FIFO is accessed through a corresponding FIFOn register. A read of an endpoint FIFOn
register unloads one byte from the FIFO; a write of an endpoint FIFOn register loads one byte into the end-
point FIFO. When an endpoint FIFO is configured for Split Mode, a read of the endpoint FIFOn register
unloads one byte from the OUT endpoint FIFO; a write of the endpoint FIFOn register loads one byte into
the IN endpoint FIFO.
USB Register Definition 12.6. FIFOn: USB0 Endpoint FIFO Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FIFODATA
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
USB Addresses 0x20–0x21 provide access to the 2 pairs of endpoint FIFOs:
Reset Value
00000000
USB Address:
0x20–0x21
IN/OUT Endpoint FIFO
0
1
USB Address
0x20
0x21
Writing to the FIFO address loads data into the IN FIFO for the corresponding endpoint.
Reading from the FIFO address unloads data from the OUT FIFO for the corresponding
endpoint.
98
Rev. 0.5