C8051F326 Datasheet, PDF (74/140 Pages) List of Unclassifed Manufacturers – Full Speed USB, 16 kB Flash MCU Family

C8051F326/7
10.1.1. Adjusting the Internal Oscillator on C8051F326/7 Devices
The OSCICL reset value is factory calibrated to result in a 12 MHz internal oscillator with a ±1.5% accu-
racy; this frequency is suitable for use as the USB clock (see Section 10.4). Software may adjust the fre-
quency of the internal oscillator using the OSCICL register.
Important Note: Once the internal oscillator frequency has been modified, the internal oscillator may not
be used as the USB clock as described in Section 10.4. The internal oscillator frequency will reset to its
original factory-calibrated frequency following any device reset, at which point the oscillator is suitable for
use as the USB clock.
10.1.2. Internal Oscillator Suspend Mode
The internal oscillator may be placed in Suspend mode by writing ‘1’ to the SUSPEND bit in register
OSCICN. In Suspend mode, the internal oscillator is stopped until a non-idle USB event is detected (Sec-
tion 12) or VBUS matches the polarity selected by the VBPOL bit in register REG0CN (Section 5.2). Note
that the USB transceiver must be enabled or in Suspend mode for a USB event to be detected.
SFR Definition 10.1. OSCICN: Internal Oscillator Control
R/W
R
R/W
R
IOSCEN IFRDY SUSPEND —
R/W
R/W
R/W
R/W
Reset Value
—
—
IFCN1 IFCN0 11000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xB2
Bit7:
Bit6:
Bit5:
Bits4–2:
Bits1–0:
IOSCEN: Internal Oscillator Enable Bit.
0: Internal Oscillator Disabled.
1: Internal Oscillator Enabled.
IFRDY: Internal Oscillator Frequency Ready Flag.
0: Internal Oscillator is not running at programmed frequency.
1: Internal Oscillator is running at programmed frequency.
SUSPEND: Force Suspend
Writing a ‘1’ to this bit will force the internal oscillator to be stopped. The oscillator will be re-
started on the next non-idle USB event (i.e., RESUME signaling) or VBUS interrupt event
(see SFR Definition 5.1).
UNUSED. Read = 000b, Write = don't care.
IFCN1–0: Internal Oscillator Frequency Control Bits.
00: SYSCLK derived from Internal Oscillator divided by 8.
01: SYSCLK derived from Internal Oscillator divided by 4.
10: SYSCLK derived from Internal Oscillator divided by 2.
11: SYSCLK derived from Internal Oscillator divided by 1.
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