C8051F326 Datasheet, PDF (126/140 Pages) List of Unclassifed Manufacturers – Full Speed USB, 16 kB Flash MCU Family

C8051F326/7
SFR Definition 13.2. SMOD0: UART0 Mode
R/W
MCE0
Bit7
R/W
S0PT1
Bit6
R/W
S0PT0
Bit5
R/W
PE0
Bit4
R/W
S0DL1
Bit3
R/W
S0DL0
Bit2
R/W
XBE0
Bit1
R/W
Reset Value
SBL0 00001100
Bit0
Bit
Addressable
SFR Address: 0x9A
Bit7:
Bits6–5:
Bit4:
Bits3–2:
Bit1:
Bit0:
MCE0: Multiprocessor Communication Enable.
0: RI will be activated if stop bit(s) are ‘1’.
1: RI will be activated if stop bit(s) and extra bit are ‘1’ (extra bit must be enabled using
XBE0).
Note: This function is not available when hardware parity is enabled.
S0PT[1:0]: Parity Type.
00: Odd
01: Even
10: Mark
11: Space
PE0: Parity Enable.
This bit activates hardware parity generation and checking. The parity type is selected by
bits S0PT1-0 when parity is enabled.
0: Hardware parity is disabled.
1: Hardware parity is enabled.
S0DL[1:0]: Data Length.
00: 5-bit data
01: 6-bit data
10: 7-bit data
11: 8-bit data
XBE0: Extra Bit Enable
When enabled, the value of TBX0 will be appended to the data field.
0: Extra Bit Disabled.
1: Extra Bit Enabled.
SBL0: Stop Bit Length
0: Short - Stop bit is active for one bit time (all data field lengths).
1: Long - Stop bit is active for two bit times (data length = 6, 7, or 8 bits).
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