C8051F326 Datasheet, PDF (17/140 Pages) List of Unclassifed Manufacturers – Full Speed USB, 16 kB Flash MCU Family

C8051F326/7
1.1.3. Additional Features
The C8051F326/7 SoC family includes several key enhancements to the CIP-51 core and peripherals to
improve performance and ease of use in end applications.
The extended interrupt handler provides 8 interrupt sources into the CIP-51. An interrupt driven system
requires less intervention by the MCU, giving it more effective throughput. The interrupt sources are very
useful when building multi-tasking, real-time systems.
Seven reset sources are available: power-on reset circuitry (POR), an on-chip VDD monitor (forces reset
when power supply voltage drops below V_RST as given in Table 7.1 on page 64), the USB controller (USB
bus reset or a VBUS transition), a Missing Clock Detector, a forced software reset, an external reset pin,
and an errant Flash read/write protection circuit. Each reset source except for the POR, Reset Input Pin, or
Flash error may be disabled by the user in software.
The internal oscillator is factory calibrated to 12 MHz ±1.5%, and the internal oscillator period may be user
programmed in ~0.25% increments. An additional low-frequency oscillator is also available which facili-
tates low power operation. A clock recovery mechanism allows the internal oscillator to be used with the 4x
Clock Multiplier as the USB clock source in Full Speed mode; the internal oscillator can also be used as
the USB clock source in Low Speed mode. An external CMOS clock may also be used with the 4x Clock
Multiplier. The system clock may be configured to use the internal oscillator, external clock, low-frequency
oscillator, or the Clock Multiplier output divided by 2. If desired, the system clock source may be switched
on-the-fly between oscillator sources. The external clock and internal low-frequency oscillator can be
extremely useful in low power applications, allowing the MCU to run from a slow (power saving) clock
source, while periodically switching to the high-frequency internal oscillator as needed.
VDD
S u pp ly
M o nito r
+
-
E n ab le
Power On
Reset
'0'
(wired-OR )
/RST
XTAL2
Low
F re qu e ncy
O s ci ll ato r
In tern al
O s ci ll ato r
E xte rn al
Clock Input
M i ss in g
Clock
Detector
(one-
shot)
EN
S ys te m
Clock
Clock Select
CIP-51
M icrocontrolle r ^{System Reset}
Core
Extended Interrupt
H an d le r
(Software Reset)
SWRSF
Reset
Funnel
Errant
FLASH
O pe ra ti on
Figure 1.4. On-Chip Clock and Reset
Rev. 0.5
17