MC80F0424 Datasheet, PDF (79/135 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

Preliminary
MC80F0424/0432/0448
15. ANALOG TO DIGITAL CONVERTER
The analog-to-digital converter (A/D) allows conversion of an
analog input signal to a corresponding 10-bit digital value. The A/
D module has sixteen analog inputs, which are multiplexed into
one sample and hold. The output of the sample and hold is the in-
put into the converter, which generates the result via successive
approximation. The analog supply voltage is connected to AV_DD
of Sample & Hold logic of A/D module. The AV_DD was separat-
ed with V_DD in order to minimize the degradation of operation
characteristic by power supply noise.
The A/D module has three registers which are the control register
ADCM and A/D result register ADCRH and ADCRL. The AD-
CRH[7:6] is used as ADC clock source selection bits too. The
register ADCM, shown in Figure 15-4, controls the operation of
the A/D converter module. The port pins can be configured as an-
alog inputs or digital I/O.
It is selected for the corresponding channel to be converted by
setting ADS[3:0]. The A/D port is set to analog input port by
ADEN and ADS[3:0] regardless of port I/O direction register.
The port deselected by ADS[3:0] operates as normal port.
ADCRH and ADCRL contains the results of the A/D conversion.
When the conversion is completed, the result is loaded into the
ADCRH and ADCRL, the A/D conversion status bit ADSF is set
to “1”, and the A/D interrupt flag ADCIF is set. See Figure 15-1
for operation flow.
The block diagram of the A/D module is shown in Figure 15-3.
The A/D status bit ADSF is set automatically when A/D conver-
sion is completed, cleared when A/D conversion is in process.
The conversion time takes 12 times of conversion source clock.
The period of actual A/D conversion clock should be minimally
1µs
Analog
Input
0~1000pF
User Selectable
AN0~AN15
Enable A/D Converter
A/D Input Channel Select
Conversion Source Clock Select
A/D Start (ADST = 1)
NOP
ADSF = 1
NO
YES
Read ADCRH, ADCRL
Figure 15-1 A/D Converter Operation Flow
How to Use A/D Converter
The processing of conversion is start when the start bit ADST is
set to “1”. After one cycle, it is cleared by hardware. The register
Figure 15-2 Analog Input Pin Connecting Capacitor
A/D Converter Cautions
(1) Input range of AN0 to AN15
The input voltage of AN0 to AN15 should be within the specifi-
cation range. In particular, if a voltage above AV_DD or below
AV_SS is input (even if within the absolute maximum rating
range), the conversion value for that channel can not be indeter-
minate. The conversion values of the other channels may also be
affected.
(2) Noise countermeasures
In order to maintain 10-bit resolution, attention must be paid to
noise on pins AV_DD and AN0 to AN15. Since the effect increases
in proportion to the output impedance of the analog input source,
it is recommended in some cases that a capacitor be connected ex-
ternally as shown in Figure 15-2 in order to reduce noise. The ca-
pacitance is user-selectable and appropriately determined
according to the target system.
(3) Pins AN0/R60 to AN15/R77
The analog input pins AN0 to AN15 also function as input/output
port (PORT R6 and R7) pins. When A/D conversion is performed
with any of pins AN0 to AN15 selected, be sure not to execute a
PORT input instruction while conversion is in progress, as this
may reduce the conversion resolution.
Also, if digital pulses are applied to a pin adjacent to the pin in the
process of A/D conversion, the expected A/D conversion value
may not be obtainable due to coupling noise. Therefore, avoid ap-
plying pulses to pins adjacent to the pin undergoing A/D conver-
sion.
MAR. 2005 Ver 0.2
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