MC80F0424 Datasheet, PDF (66/135 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC80F0424/0432/0448
Preliminary
14.2 16-bit Timer / Counter Mode
The Timer register is being run with all 16 bits. A 16-bit timer/
counter register T0, T1 are incremented from 0000_H until it
matches TDR0, TDR1 and then resets to 0000_H. The match out-
put generates Timer 0 interrupt.
The clock source of the Timer 0 is selected either internal or ex-
ternal clock by bit T0CK[2:0]. In 16-bit mode, the bits
T1CK[1:0] and 16BIT of TM1 should be set to "1" respectively
as shown in Figure 14-10.
Likewise, A 16-bit timer/counter register T2, T3 are incremented
from 0000_H until it matches TDR2, TDR3 and then resets to
0000_H. The match output generates Timer 2 interrupt.
The clock source of the Timer 2 is selected either internal or ex-
ternal clock by bit T2CK[2:0]. In 16-bit mode, the bits
T3CK[1:0] and 16BIT of TM3 should be set to "1" respectively
as shown in Figure 14-11.
Even if the Timer 0 (including Timer 1) is used as a 16-bit timer,
the Timer 2 and Timer 3 can still be used as either two 8-bit timer
or one 16-bit timer by setting the TM2. Reversely, even if the
Timer 2 (including Timer 3) is used as a 16-bit timer, the Timer
0 and Timer 1 can still be used as 8-bit timer independently.
A 16-bit timer/counter 4 register T4H, T4L are increased from
0000_H until it matches TDR4H, TDR4L and then resets to 0000_H.
The match output generates Timer 4 interrupt. Timer/Counter 4
is 16 bit mode as shown in Figure 14-12.
TM0
TM1
7
6
5
4
3
2
1
0
-
- CAP0 T0CK2 TB0TCCKL1 T0CK0 T0CN T0ST
-
-
0
X
X
XX
X
ADDRESS: 0D0_H
INITIAL VALUE: --000000_B
X means the value of "0" or "1" corresponding to user operation
7
6
5
4
3
2
1
0
POL 16BIT PWM1E CAP1 TB1TCCKL1 T1CK0 T1CN T1ST
X1
0
0
1
1
X
X
ADDRESS: 0D2_H
INITIAL VALUE: 00_H
EC0 PIN
X_IN PIN
RISING EDGE
DETECTOR
T0CK[2:0]
111
÷2
000
÷4
001
÷8
010
÷ 32
011
÷ 128
100
÷ 512
101
÷ 2048 ₁₁₀
MUX
T0CN
TIMER 0 + TIMER 1 → TIMER 0 (16-bit)
T0ST
0: Stop
1: Clear and start
T1 + T0
(16-bit)
clear
Comparator
TDR1 + TDR0
(16-bit)
Higher byte Lower byte
COMPARE DATA
T0IF
F/F
TIMER 0
INTERRUPT
(Not Timer 1 interrupt)
R14/T0O
Figure 14-10 16-bit Timer/Counter for Timer 0, 1
62
MAR. 2005 Ver 0.2