MC80F0424 Datasheet, PDF (34/135 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC80F0424/0432/0448
Preliminary
8.3 Data Memory
Figure 8-8 shows the internal Data Memory space available. Data
Memory is divided into three groups, a user RAM, control regis-
ters, and Stack memory.
0000_H
00BF_H
00C0_H
00FF_H
0100_H
01FF_H
0200_H
02FF_H
0300_H
03FF_H
0400_H
04FF_H
0500_H
05FF_H
0600_H
063F_H
0640_H
0EBF_H
0EC0_H
0EFF_H
User Memory
(192Bytes)
Control
Registers (64Bytes)
User Memory
or Stack Area
(256Bytes)
UU((ss22ee55rr66MMBBeeyyttmmeessoo))rryy
User Memory
(256Bytes)
User Memory
(256Bytes)
User Memory
(256Bytes)
User Memory
(64Bytes)
Not Used
Extended SFR
(64Bytes)
PAGE0
(When “G-flag=0”,
this page0 is selected)
PAGE1
PAGE2
PAGE3
PAGE4
PAGE5
PAGE6
Figure 8-8 Data Memory Map
User Memory
The MC80F0424/0432/0448 has 1.5kbytes for the user memory
(RAM). RAM pages are selected by RPR (See Figure 8-9).
Note: After setting RPR(RAM Page Select Register), be
sure to execute SETG instruction. When executing CLRG
instruction, be selected PAGE0 regardless of RPR.
Control Registers
The control registers are used by the CPU and Peripheral function
blocks for controlling the desired operation of the device. There-
fore these registers contain control and status bits for the interrupt
system, the timer/ counters, analog to digital converters and I/O
ports. The control registers are in address range of 0C0_H to 0FF_H.
Note that unoccupied addresses may not be implemented on the
chip. Read accesses to these addresses will in general return ran-
dom data, and write accesses will have an indeterminate effect.
More detailed informations of each register are explained in each
peripheral section.
Note: Write only registers can not be accessed by bit ma-
nipulation instruction. Do not use read-modify-write instruc-
tion. Use byte manipulation instruction, for example “LDM”.
Example; To write at CKCTLR
LDM CLCTLR,#0AH ;Divide ratio(÷32)
Stack Area
The stack provides the area where the return address is saved be-
fore a jump is performed during the processing routine at the ex-
ecution of a subroutine call instruction or the acceptance of an
interrupt.
When returning from the processing routine, executing the sub-
routine return instruction [RET] restores the contents of the pro-
gram counter from the stack; executing the interrupt return
instruction [RETI] restores the contents of the program counter
and flags.
The save/restore locations in the stack are determined by the
stack pointed (SP). The SP is automatically decreased after the
saving, and increased before the restoring. This means the value
of the SP indicates the stack location number for the next save.
Refer to Figure 8-4 on page 26.
RPR
R/W R/W R/W
7
6
5
4
3
2
1
0
-
-
-
-
- RPR2 RPR1 RPR0
ADDRESS: 0E1_H
INITIAL VALUE: -----000_B
RAM page select
000 : PAGE0
001 : PAGE1
010 : PAGE2
011 : PAGE3
100 : PAGE4
101 : PAGE5
110 : PAGE6
Figure 8-9 RPR(RAM Page Select Register)
30
MAR. 2005 Ver 0.2