MC80F0424 Datasheet, PDF (105/135 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

Preliminary
MC80F0424/0432/0448
21. POWER SAVING OPERATION
The MC80F0424/0432/0448 has two power-down modes. In
power-down mode, power consumption is reduced considerably.
For applications where power consumption is a critical factor, de-
vice provides two kinds of power saving functions, STOP mode
21.1 Sleep Mode
In this mode, the internal oscillation circuits remain active and
oscillation continues and peripherals are operate normally, but
CPU stops. Movement of all peripherals is shown in Table 21-1.
SLEEP mode is entered by setting the SSCR register to “0Fh”. It
and SLEEP mode. Table 21-1 shows the status of each Power
Saving Mode. SLEEP mode is entered by the SSCR register to
“0Fh”., and STOP mode is entered by STOP instruction after the
SSCR register to “5Ah”.
is released by Reset or interrupt. To be released by interrupt, in-
terrupt should be enabled before SLEEP mode.
SSCR
WW WWWW WW
7
6
5
4
3
2
1
0
ADDRESS: 0F5_H
INITIAL VALUE: 0000 0000_B
Power Down Control
5A_H: STOP mode
0F_H: SLEEP mode
1. To get into STOP mode, SSCR must be set to 5AH just before STOP instruction execution.
At STOP mode, Stop & Sleep Control Register (SSCR) value is cleared automatically when released.
2. To get into SLEEP mode, SSCR must be set to 0FH.
Figure 21-1 STOP and SLEEP Control Register
Release the SLEEP mode
The exit from SLEEP mode is hardware reset or all interrupts.
Reset re-defines all the Control registers but does not change the
on-chip RAM. Interrupts allow both on-chip RAM and Control
registers to retain their values.
If I-flag = 1, the normal interrupt response takes place. If I-flag =
0, the chip will resume execution starting with the instruction fol-
lowing the SLEEP instruction. It will not vector to interrupt serv-
ice routine. (refer to Figure 21-4)
When exit from SLEEP mode by reset, enough oscillation stabi-
lization time is required to normal operation. Figure 21-3 shows
the timing diagram. his guarantees that oscillator has started and
stabilized. By interrupts, exit from SLEEP mode is shown in Fig-
ure 21-2. By reset, exit from SLEEP mode is shown in Figure 21-
3.
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