NT68520XF Datasheet, PDF (59/97 Pages) List of Unclassifed Manufacturers – XGA,SXGA Flat Panel Monitor Controller

D0 VO_POL
0: Negative polarity
1: Positive polarity
Vsync output polarity control
0: Negative polarity
1: Positive polarity
Default: 0000 0000B
NT68520X,E
89H: Hsync Pulse Width (R)
Bits Name
D7-0 HPW
[7:0]
Description
Sync processor will detect the pulse width of the external HSYNCI/SOG Input.
Unit : 83.3ns/count
Default：XXXX XXXXB
8AH: Hsync Filter Reference (R/W)
Bits Name
D7-0 HFLT
[7:0]
Description
Time width of Pulse Filter for Composite/SOG sync extraction. H sync pulse
with pulse width less than the reference value will be filtered out.(HPW+4)
Unit : 83.3ns/count
Default: 1111 1111B
4
HPW HFLT
Spectrum
8BH: H/V Sync Counter Interval (R/W)
Bits Name
D7-4
Description
Reserved
D3-2 VOV_SEL
[1:0]
Overflow time interval control bits of Vsync Counter
00: 32.768ms
01: 65.536ms
10: 98.304ms
11: 131.072ms
D1 HGATE_SR Gate Source control bit for Hsync Counter
C
0: from Vsync Period
1: from Internal Time Gate; see HGATE_TME bit in this byte
2003/4/15
59
Ver.1.0