NT68520XF Datasheet, PDF (12/97 Pages) List of Unclassifed Manufacturers – XGA,SXGA Flat Panel Monitor Controller

85
86
87
88
89
90
91
92-99
100
101-108
109
110-117
118
119
120
99
100
101
102
103
104
105
106-113
114,115
116-123
124,125
126-133
124
125,126
127
NC
DGND
NC
NC
DGND
NC
DCLK
RA0 ~ RA7
DVDD
GA0 ~ GA7
DGND
BA0 ~ BA7
DVDD
CGND
CVDD
121
128
122-133 129-140
134 141,142
DVDD
B0~B7, G0~G3
CVDD
143,144
135 145,146
136-143 147-154
144
155
145 156-158
146 159-160
147 161,162
CGND
DGND
Y0-Y7
G4~G7, R0~R3
YUV_CLK/DVI_CLK
DVDD
VDD
CVDD_CAP
148
163
149
164
150
165
HSYNCO
VSYNCO
I2C_ADDR0/R4
151
166
I2C_ADDR1/R5
152
167
153
168
2003/4/15
R6
R7
12
NT68520X,E
NC pin
P Display digital ground
Connect to digital ground
Connect to digital ground
P Display digital ground
NC pin
O Display clock
O Port A, R channel output
P Display digital power supply
O Port A, G channel output
P Display digital ground
O Port A, B channel output
P Display digital power supply
P Core logic ground
P Core logic power de-couple
pin. External capacitor (0.1uF)
Connection is recommended.
P Display digital power supply
I Digital input B0~B7, G0~G7
P Core logic power de-couple
pin. External capacitor (0.1uF)
Connection is recommended.
P Core logic ground
P Display digital ground
I Video data input of bit 0~7
Digital input G4~G7, R0~R3
I 1.Video port clock input
2.Digital RGB clock input
P Display digital power supply
P Main power supply for internal
regulator (3.3V)
P Internal regulator output pin.
External regulating capacitor
(10uF~100uF) connection is
needed.
O Sync-process horizontal sync
output
O Sync-process vertical sync
output
I 1.I2C slave address, Refer to
Page 27 I2C slave address
setting
2.Digital input R4
I 1.I2C slave address. Refer to
Page 27 for I2C slave address
setting
2.Digital input R5
Digital input R6
Digital input R7
Ver.1.0