NT68520XF Datasheet, PDF (31/97 Pages) List of Unclassifed Manufacturers – XGA,SXGA Flat Panel Monitor Controller

NT68520X,E
Ù­If both I2C_ADDR0 and I2C_ADDR1 are pulled high, the NT68520 will go into the
test mode after the reset.
e.g. :
IF the NT68520’s I2C_ADDR1,I2C_ADDR2 pins are pulled up by resisters, when the
reset signal is going from low to high, the value of the two pins (‘1’) will be latched, and
then the I2C address is determined as BXh.
I2C_ADDR0
I2C_ARRD1
I2C Address:
1 0 1 1 0 X X R/W
Depond on level of pin I2C_ADDR0
while reset is finished
0 0 B0h (I2C bus)
0 1 B1h (I2C bus)
1 0 B2h (I2C bus)
1 1 Don't use (Pbus)
Depond on level of pin I2C_ADDR1
while reset is finished
2003/4/15
31
Ver.1.0