NT68520XF Datasheet, PDF (34/97 Pages) List of Unclassifed Manufacturers – XGA,SXGA Flat Panel Monitor Controller

03H: ADC Phase Control (R/W)
Bits Name
D7 PU_Amck1
D6 PU_Rvga1
D5 PU_Radc1
D4-0
Description
1= Power-up ADC clock generator.
1= Power-up R channel VGA circuit.
1= Power-up R channel A2D converter.
Reserve
Default：1110 0000B
NT68520X,E
04H: Green Channel Gain Control (R/W)
Bits Name
D7-0 GGAIN[7:0]
Description
The gain ranges from 0.8 to 2.0 for the G-channel, the register is defined
by 8-bits to produce the 1V(p-p) output signal for ADC input. G_Gain = 0.8 +
1.2/255 * D[7:0]
Default：0000 0000B
05H: CKBO Channel Phase Control (R/W)
Bits Name
D7 PU_Omck1
D6 PU_Gvga1
D5 PU_Gadc1
D4-0 Oph[4:0]
Description
1= Power-up CKBO clock generator.
1= Power-up G channel VGA circuit.
1= Power-up G channel A2D converter.
The Phase Adjust Control is defined by 5-bits, and the total step is 32 for
phase shift （360°/ 32Step = 11.25°/Step）
Default：1110 0000B
06H: Blue Channel Gain Control (R/W)
Bits Name
D7-0 BGAIN[7:0]
Description
The gain ranges from 0.8 to 2.0 for B-channel, the register is defined by
8-bits to produce 1V(p-p) output signal for ADC input. B_Gain = 0.8 + 1.2/255
* D[7:0]
Default：0000 0000B
07H: VGA Control (R/W)
Bits Name
D7
D6 PU_Bvga1
D5 PU_Badc1
D4-2
D1 CALDIS
D0 DRVCTL
Description
Reserve
1= Power-up B channel VGA circuit.
1= Power-up B channel A2D converter.
Reserve
VGA DC offset adjust
0 : Auto adjust.
1 : User adjust.
VGA output driver
0 : Normal drive.
1 : Strong drive.
Default：X11X XX00B
2003/4/15
34
Ver.1.0