NT68520XF Datasheet, PDF (19/97 Pages) List of Unclassifed Manufacturers – XGA,SXGA Flat Panel Monitor Controller

NT68520X,E
! If the YUV input is enabled, the Auto Position will detect the video back-porch
and active region values according to the YUV_HREF input signal instead of the
RGB input data.
Programming Steps:
1. Specify an area covering the back porch of input video.
2. Enable the Auto Gain function.
3. Get the max R/G/B value.
4. Set the R/G/B Noise Margin value.
5. Enable the Auto Position function in Single mode.
6. Wait for Ready bit.
7. Read the detected value.
Auto Clock
By setting the H Active Reference Count value and getting the Auto Position result, it is
easy to get the frequency of input pixel clock.
Programming Steps:
1 ~ 4. It is the same as above.
5. Set the H Active Reference Count value.
Ex: If the input video resolution is 800x600, then program the H Active Reference
Count register with 800 values.
6. Enable the Auto Position function in Burst mode.
7. Wait for Ready bit.
8. Read the Status Register [3:2] to decide whether to increase or decrease the
ADCPLL’s divider value.
9. If Status Register [3:2] = 01 (Detected H width = H Reference Count), it means the
correct input pixel clock is obtained.
DISPLAY INTERFACE
The NT68520 display interface supports a single (24-bit) or a dual (48-bit) pixel out
format and a 6-bit/color or 8-bit/color LCD panel. The built-in internal PLL locking to the
reference clock generates all of the display timing to various LCD panels.
The NT68520 also provides the programmable display driving capacity to reduce EMI
influence as well as programmable clock delay to compensate clock skew.
2003/4/15
19
Ver.1.0