IBIS4-6600 Datasheet, PDF (35/63 Pages) Cypress Semiconductor – High resolution 6.6 M Pixel Rolling shutter CMOS Image sensor

IBIS4-6600
Datasheet
bits
0110
0111
Delay [# SYS_CLOCK periods] bits
4
1110
5
1111
Delay [# SYS_CLOCK periods]
12
13
3.9.2.f X_REG register
The X_REG register determines the start position of the window in the X-direction. In
this direction, there are 2208 + 2 + 12 readable pixels. In the active pixel array sub-
sampling blocks are 24 pixels wide and the columns are read two by two and
therefore, the number of start positions equals 2208/24 +2/2 +12/2 = 92 + 1 + 6 = 99.
3.9.2.g Y_REG register
The Y_REG register determines the start position of the window in the Y-direction. In
this direction, there are 3000 + 2 + 12 readable pixels. In the active pixel array sub-
sampling blocks are 24 pixels wide and the rows are read one by one and therefore,
the number of start positions equals 3000/24 + 2/2 +12 = 125 + 1 + 12 = 138.
3.9.2.h IMAGE_CORE register
Bits 0:1 of the IMAGE_CORE register defines the several test modes of the image core.
Setting 00 is the default and normal operation mode. In case the bit is set to 1, the odd
(bit 0) or even (bit 1) columns are tight to VDD. These test modes can be used to tune
the sampling point of the ADC’s to an optimal position.
Bits 2:7 of the IMAGE_CORE register define the sub-sampling mode in the X-direction
(bits 2:4) and in the Y-direction (bits 5:7). The sub-sampling modes and
corresponding bit setting are given in 3.6.
3.9.2.i AMPLIFIER register
3.9.2.i.1 Gain (bits 0:3)
The gain bits determine the gain setting of the output amplifier. They are only
effective if UNITY = 0. The gains and corresponding bit setting are given in Table 8 in
3.5.2.
3.9.2.i.2 Unity (bit 4)
In case UNITY = 1, the gain setting of GAIN is bypassed and the gain amplifier is put
in unity feedback.
3.9.2.i.3 One_out
If ONE_OUT = 0, the two output amplifiers are active. If ONE_OUT = 1, the signals
from the two busses are multiplexed to output OUT1. The gain amplifier and output
driver of the second path are put in standby.
Cypress Semiconductor Corporation 3901 North First Street
San Jose, CA 95134
408-943-2600
Contact: [e-mail] Document #: 38-05708 Rev.**(Revision 1.3 )
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