IBIS4-6600 Datasheet, PDF (32/63 Pages) Cypress Semiconductor – High resolution 6.6 M Pixel Rolling shutter CMOS Image sensor

IBIS4-6600
Datasheet
After a certain integration time, the read out can be done in a similar way. The Y shift
registers are again synchronized to the first row. Both shift registers are driven
identically, and all rows & columns are scanned for (destructive) readout.
FAST_RESET = 1 puts the sequencer in such mode that the left and right shift registers
are both controlled identically.
3.9.2.a.5 Output amplifier calibration (bit 5 and 6)
Bits FRAME_CAL_MODE and LINE_CAL_MODE define the calibration mode of the
output amplifier.
During every row-blanking period, a calibration is done of the output amplifier.
There are 2 calibration modes. The FAST mode (= 0) can force a calibration in one
cycle but is not so accurate and suffers from kTC noise, while the SLOW mode (= 1)
can only make incremental adjustments and is noise free. Approximately 200 or more
“slow” calibrations will have the same effect as 1 “fast” calibration.
Different calibration modes can be set at the beginning of the frame
(FRAME_CAL_MODE bit) and for every subsequent row that is read (LINE_CAL_MODE
bit).
3.9.2.a.6 Continuous charge (bit 7)
For some applications it might be necessary to use continuous charging of the pixel
columns instead of a precharge on every row sample operation.
Setting bit CONT_CHARGE to 1 will activate this function. The resistor connected to
pin CMD_COL is used to control the current level on every pixel column.
3.9.2.a.7 Internal clock granularities
The system clock is divided several times on chip.
The X-shift-register that controls the column/pixel read out, is clocked by half the
system clock rate. Odd and even pixel columns are switched to 2 separate buses. In
the output amplifier the pixel signals on the 2 busses can be combined to one pixel
stream at 40 MHz.
The clock that drives the X-sequencer can be a multiple of 2, 4, 8 or 16 times the
system clock. Table 14 shows the settings for the granularity of the X-sequencer clock
and the corresponding row blanking time (for NDR = 0). A row blanking time of 7.18
µs is the baseline for almost all applications.
Table 14: Granularity of X-sequencer clock and corresponding row blanking time (for NDR = 0).
Gran_x_seq_msb/lsb ^X-sequencer
00
2 x sys_clock
Row blanking Row blanking time
142 x T_{SYS_CLOCK}
3.55
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San Jose, CA 95134
408-943-2600
Contact: [e-mail] Document #: 38-05708 Rev.**(Revision 1.3 )
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