S6E2C2 Datasheet, PDF (204/207 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller

S6E2C2 Series
15. Major Changes
Spansion Publication Number: S6E2C2_DS709-00013
Page
Revision 0.1
-
Revision 0.2
Section
-
1, 3
Title
13
15, 16
2.Feature
3.Product Lineup
17
4.Packages
210
15.ORDERING INFORMATION
Revision 1.0
11
2. Features
14
3. Product Lineup
88
10. Block Diagram
89
12. Memory Map
17-19 5. Pin Assignments
21-72 6. Pin Descriptions
73-80 7. I/O Circuit Type
95-103 13. Pin Status In Each CPU State
104-105 14.1. Absolute Maximum Ratings
106-110
14.2. Recommended Operating
Conditions
111-120 14.3.1. Current Rating
121-123 14.3.2. Pin Characteristics
14.4.5. Operating Conditions of
126
USB/Ethernet PLL・I2S PLL (in the case
of using main clock for input clock of PLL)
Change Results
Initial release
Added the following products.
S6E2C28HHA/S6E2C29HHA/S6E2C2AHHA/
S6E2C28JHA/S6E2C29JHA/S6E2C2AJHA/
S6E2C28LHA/S6E2C29LHA/S6E2C2ALHA
Added “Crypto Assist Function”
Added “Crypto Assist Function”
Added the following products.
S6E2C28HHA/S6E2C29HHA/S6E2C2AHHA/
S6E2C28JHA/S6E2C29JHA/S6E2C2AJHA/
S6E2C28LHA/S6E2C29LHA/S6E2C2ALHA
Added the following part numbers.
S6E2C28HHAGV20000/ S6E2C29HHAGV20000/
S6E2C2AHHAGV20000
S6E2C28JHAGV20000/ S6E2C29JHAGV20000/
S6E2C2AJHAGV20000
S6E2C28JHAGB10000/ S6E2C29JHAGB10000/
S6E2C2AJHAGB10000
S6E2C28LHAGL20000/ S6E2C29LHAGL20000/
S6E2C2ALHAGL20000
Deleted HDM-CEC/Remote Control Receiver.
Deleted the pins of HDM-CEC/Remote Control
Receiver.(CEC0,CEC1)
Revised the pin name of I2S. (MI2S*_0→MI2S*0_0)
Deleted the pin of IGTRG0_0.
Deleted the pins of HDM-CEC/Remote Control
Receiver.(CEC0,CEC1)
Revised the pin name of I2S. (MI2S*_0→MI2S*0_0)
Revised the pin number of PF7 in LQFP216.(91→90)
Revised the pin number of X1. (73, 58, 50, P5→107, 87, 71, P13)
Revised the pin number of X0A. (107, 87, 71, P13→73, 58, 50, P5)
Revised IOH/IOL of Type S.(IOH=-12mA→-10mA, IOL=12mA→
10mA)
Added the case of using I2C in Type E, F, G, L, N, S.
Deleted X and Y in Pin Status Type.
Added 10 mA type.
Added AVRL in Analog reference voltage.
Revised the mistake in Ethernet-MAC Pins.
Revised the leakage current in Maximum leakage current at
operating
Revised the maximum current of each category.
Added the characteristic of external bus in H level input voltage
(hysteresis input).
Added the characteristic of 10 mA type.
Revised the maximum of I2S PLL macro oscillation clock
frequency.
(307.2 MHz→384 MHz)
Document Number: 002-05030 Rev.*A
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