S6E2C2 Datasheet, PDF (116/207 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller

S6E2C2 Series
12.4.6 Operating Conditions of Main PLL (in the Case of Using Built-in High-speed CR Clock for Input Clock of Main PLL)
(VCC = 2.7V to 5.5V, VSS = 0V)
Parameter
PLL oscillation stabilization wait time^*1
(lock up time)
Symbol
Min
Value
Typ
Max
tLOCK
100
-
-
Unit
µs
Remarks
PLL input clock frequency
fPLLI
3.8
4
4.2
MHz
PLL multiplication rate
-
50
-
95
multiplier
PLL macro oscillation clock frequency
fPLLO
190
-
400
MHz
Main PLL clock frequency ^*2
fCLKPLL
-
-
200
MHz
*1: Time from when the PLL starts operating until the oscillation stabilizes
*2: For more information about Main PLL clock (CLKPLL), see CHAPTER 2-1: Clock in FM4 Family Peripheral
Manual Main Part (002-04856).
Note:
− The High-speed CR clock (CLKHC) should be set with frequency/temperature trimming to act as the source clock of the
Main PLL.
12.4.7 Reset Input Characteristics
Parameter
Reset input time
Symbol
tINITX
Pin
Name
INITX
Conditions
-
(VCC = 2.7V to 5.5V, VSS = 0V)
Value
Min
Typ
Unit Remarks
500
-
ns
Document Number: 002-05030 Rev.*A
Page 116 of 207