S6E2C2 Datasheet, PDF (2/207 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller

S6E2C2 Series
Multi-function Serial Interface (Max 16 channels)
Separate 64 byte receive and transmit FIFO buffers for
channels 0 to 7.
Operation mode is selectable for each channel from the
following:
 UART
 CSIO (SPI)
 LIN
 I²C
 UART
 Full-duplex double buffer
 Selection with or without parity supported
 Built-in dedicated baud rate generator
 External clock available as a serial clock
 Various error detect functions available (parity errors,
framing errors, and overrun errors)
CSIO (SPI)
 Full-duplex double buffer
 Built-in dedicated baud rate generator
 Overrun error detect function available
 Serial chip select function (ch 6 and ch 7 only)
 Supports high-speed SPI (ch 4 and ch 6 only)
 Data length 5 to 16-bit
 LIN
 LIN protocol Rev.2.1 supported
 Full-duplex double buffer
 Master/slave mode supported
 LIN break field generation (can change to 13- to 16-bit
length)
 LIN break delimiter generation (can change to 1- to 4-bit
length)
 Various error detect functions available (parity errors,
framing errors, and overrun errors)
 I²C
 Standard mode (Max 100 kbps)/Fast mode (Max 400 kbps)
supported
 Fast mode Plus (Fm+) (Max 1000 kbps, only for ch 3 = ch A
and ch 7 = ch B) supported
DMA Controller (Eight channels)
DMA controller has an independent bus, so the CPU and DMA
controller can process simultaneously.
Eight independently configured and operated channels
Transfer can be started by software or request from the
built-in peripherals
Transfer address area: 32-bit (4 GB)
Transfer mode: Block transfer/Burst transfer/Demand
transfer
Transfer data type: bytes/half-word/word
Transfer block count: 1 to 16
Number of transfers: 1 to 65536
Document Number: 002-05030 Rev.*A
DSTC (Descriptor System data Transfer Controller;
256 Channels)
The DSTC can transfer data at high-speed without going via
the CPU. The DSTC adopts the descriptor system and,
following the specified contents of the descriptor that has
already been constructed on the memory, can access directly
the memory/peripheral device and perform the data-transfer
operation.
It supports the software activation, the hardware activation,
and the chain activation functions.
A/D Converter (Max 32 channels)
12-bit A/D Converter
 Successive approximation type
 Built-in three units
 Conversion time: 0.5 μs at 5 V
 Priority conversion available (priority at two levels)
 Scanning conversion mode
 Built-in FIFO for conversion data storage (for SCAN
conversion: 16 steps, for priority conversion: 4 steps)
D/A Converter (Max 2 Channels)
R-2R type
12-bit resolution
Base Timer (Max 16 Channels)
Operation mode is selected from the following for each
channel:
16-bit PWM timer
16-bit PPG timer
16-/32-bit reload timer
16-/32-bit PWC timer
General Purpose I/O Port
This series can use its pins as general purpose I/O ports when
they are not used for external bus or peripherals; moreover, the
port relocate function is built in. It can set the I/O port to which
the peripheral function can be allocated.
Capable of pull-up control per pin
Capable of reading pin level directly
Built-in port-relocate function
Up to 120 high-speed general-purpose I/O ports in 144 pin
package
Some pins 5V tolerant I/O.
See 4. Pin Descriptions and 5. I/O Circuit Type for the
corresponding pins.
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