S6E2C2 Datasheet, PDF (164/207 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller

S6E2C2 Series
12.4.14 Quadrature Position/Revolution Counter Timing
(VCC = AVCC = 2.7V to 5.5V, VSS = AVSS = 0V, TA = -40°C to +105°C)
Parameter
AIN pin H width
AIN pin L width
BIN pin H width
BIN pin L width
BIN rise time from
AIN pin H level
AIN fall time from
BIN pin H level
BIN fall time from
AIN pin L level
AIN rise time from
BIN pin L level
AIN rise time from
BIN pin H level
BIN fall time from
AIN pin H level
AIN fall time from
BIN pin L level
BIN rise time from
AIN pin L level
ZIN pin H width
ZIN pin L width
AIN/BIN rise and fall time
from determined ZIN level
Determined ZIN level from
AIN/BIN rise and fall time
Symbol
tAHL
tALL
tBHL
tBLL
tAUBU
tBUAD
tADBD
tBDAU
tBUAU
tAUBD
tBDAD
tADBU
tZHL
tZLL
tZABE
tABEZ
Conditions
-
-
-
-
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
PC_Mode2 or
PC_Mode3
QCR: CGSC = 0
QCR: CGSC = 0
QCR: CGSC = 1
QCR: CGSC = 1
Value
Min
Max
Unit
2tCYCP*
-
ns
*: tCYCP indicates the APB bus clock cycle time except when in Stop mode, in Timer mode. For more information about
the APB bus number to which the quadrature position/revolution counter is connected, see "8. Block Diagram" in this
data sheet.
tAHL
tALL
AIN
tAUBU
tBUAD
tADBD
tBDAU
BIN
tBHL
tBLL
Document Number: 002-05030 Rev.*A
Page 164 of 207