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S6E2C2 Datasheet, PDF (156/207 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller
S6E2C2 Series
When Using High-Speed Synchronous Serial Chip Select (SPI = 1, SCINV = 1, MS = 0, CSLVL = 1)
(VCC = 2.7V to 5.5V, VSS = 0V)
Parameter
Symbol Conditions
VCC < 4.5 V
Min
Min
SCS↓→SCK↓ setup time
SCK↑→SCS↑ hold time
SCS deselect time
SCS↓→SCK↑ setup time
SCK↑→SCS↑ hold time
SCS deselect time
SCS↓→SOT delay time
SCS↑→SOT delay time
tCSSI
tCSHI
tCSDI
tCSSE
tCSHE
tCSDE
tDSE
tDEE
Internal shift
clock
operation
External shift
clock
operation
(*1)-20
( *2)+0
(*3)-20
+5tCYCP
3tCYCP+15
0
3tCYCP+15
-
0
(*1)+0
( *2)+20
(*3)+20
+5tCYCP
-
-
-
25
-
(*1): CSSU bit value×serial chip select timing operating clock cycle [ns]
(*2): CSHD bit value×serial chip select timing operating clock cycle [ns]
(*3): CSDS bit value×serial chip select timing operating clock cycle [ns]
VCC≥ 4.5 V
Min
Max
(*1)-20
(*1)+0
( *2)+0
(*3)-20
+5tCYCP
3tCYCP+15
0
( *2)+20
(*3)+20
+5tCYCP
-
-
3tCYCP+15
-
-
25
0
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
− tCYCP indicates the APB bus clock cycle time. For more information about the APB bus number to which the multi-function
serial is connected, see 8. Block Diagram in this data sheet.
− For more information about CSSU, CSHD, CSDS, and the serial chip select timing operating clock, see FM4 Family
Peripheral Manual Main Part (002-04856).
− When the external load capacitance CL = 30 pF.
Document Number: 002-05030 Rev.*A
Page 156 of 207