S6E2C2 Datasheet, PDF (176/207 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller

S6E2C2 Series
MII Transmission (100 Mbps/10 Mbps)
(ETHVCC = 3.0V to 3.6V, 4.5V to 5.5V^*1, VSS = 0V, CL = 25 pF)
Parameter
Transmission clock
Cycle time^*2
Transmission clock
High-pulse-width duty cycle
Transmission clock
Low-pulse-width duty cycle
TXCK ↑ → Transmitted data
delay time
Symbol
Pin Name
tTXCYC
E_TCK
tTXCYCH
tTXCYCL
tMIITX
E_TCK
E_TCK
E_TX03, E_TX02,
E_TX01, E_TX00,
E_TXEN
Conditions
100 Mbps
40 ns (typical)
100 Mbps
400 ns (typical)
tTXCYCH/tTXCYC
tTXCYCL/tTXCYC
-
Value
Min
Max
Unit
-
-
ns
-
-
ns
35
65
%
35
65
%
-
24
ns
*1: When ETHV = 4.5V to 5.5V, it is recommended to add a series resistor at the output pin to suppress the output
current.
*2: The transmission clock is fixed to 25 MHz or 2.5 MHz in the MII specifications. The clock accuracy should meet the
PHY-device specifications.
E_TCK
E_TX03
E_TX02
E_TX01
E_TX00
E_TXEN
tTXCYC
V_IHS
V_ILS
V_IHS
tTXCYCH
tTXCYCL
V_OH
V_OL
tMIITX
Document Number: 002-05030 Rev.*A
Page 176 of 207